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公开(公告)号：AU1275002A
公开(公告)日：2002-05-21
申请号：AU1275002
申请日：2001-11-09
Applicant: HAMAMATSU PHOTONICS KK
Inventor： NIIGAKI MINORU , NAKAJIMA KAZUTOSHI
IPC: H01L29/872 , H01L29/47 , H01L31/0203 , H01L31/108 , H01L31/18 , H01L31/101
Abstract: Multilayer films ( 2 to 7 ) containing a light absorption layer ( 4 ) are formed on a GaAs substrate. After laminating the GaAs substrate ( 1 ) and a glass substrate ( 8 ) so that an uppermost surface film ( 7 ) of the multilayer film and the glass substrate ( 8 ) may come into contact with each other, by pressurizing between the GaAs substrate ( 1 ) and the glass substrate ( 8 ) and heating them together, both substrates ( 1 ) and ( 8 ) are fusion-bonded. Next, the GaAs substrate ( 1 ) and the buffer layer ( 2 ) are first removed, and then the etch stop layer ( 3 ) is removed. Then, while coming into contact with the light absorption layer ( 4 ), comb-type Schottky electrodes ( 10 ) and ( 11 ), which are mutually apart, are formed.
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公开(公告)号：DE69028825T2
公开(公告)日：1997-02-13
申请号：DE69028825
申请日：1990-06-20
Applicant: HAMAMATSU PHOTONICS KK
Inventor： MIZUSHIMA YOSHIHIKO , NAKAJIMA KAZUTOSHI , HIROHATA TORU , IIDA TAKASHI , WARASHINA YOSHIHISA , SUZUKI TOMOKO , KAN HIROFUMI
Abstract: SUM and CARRY output signals of a first optical half adder are provided to one input terminal of a second optical half adder and an optical latch memory, respectively, and an output signal of the optical latch memory is provided to the other input terminal of the second optical half adder. Input and output of the two optical half adders and optical latch memory are performed through an optical signal. Each optical half adder includes two light-receiving elements each having a symmetrical electrode arrangement in which two Schottky junctions are connected to each other opposite in polarity, and peripheral elements of resistors, a capacitor and an amplifier. The optical latch memory is an optical flip-flop memory in which a high-speed light-receiving element produces an electric signal in response to an input optical signals, and a high-speed light-emitting element produces, in response to the electric signal guided from the light-receiving element, feed-back light to be applied to the light-receiving element and an output optical signal.
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公开(公告)号：DE69028825D1
公开(公告)日：1996-11-14
申请号：DE69028825
申请日：1990-06-20
Applicant: HAMAMATSU PHOTONICS KK
Inventor： MIZUSHIMA YOSHIHIKO , NAKAJIMA KAZUTOSHI , HIROHATA TORU , IIDA TAKASHI , WARASHINA YOSHIHISA , SUZUKI TOMOKO , KAN HIROFUMI
Abstract: SUM and CARRY output signals of a first optical half adder are provided to one input terminal of a second optical half adder and an optical latch memory, respectively, and an output signal of the optical latch memory is provided to the other input terminal of the second optical half adder. Input and output of the two optical half adders and optical latch memory are performed through an optical signal. Each optical half adder includes two light-receiving elements each having a symmetrical electrode arrangement in which two Schottky junctions are connected to each other opposite in polarity, and peripheral elements of resistors, a capacitor and an amplifier. The optical latch memory is an optical flip-flop memory in which a high-speed light-receiving element produces an electric signal in response to an input optical signals, and a high-speed light-emitting element produces, in response to the electric signal guided from the light-receiving element, feed-back light to be applied to the light-receiving element and an output optical signal.
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公开(公告)号：AU2002361114A1
公开(公告)日：2003-07-15
申请号：AU2002361114
申请日：2002-12-26
Applicant: HAMAMATSU PHOTONICS KK
Inventor： NAKAJIMA KAZUTOSHI
IPC: H01L21/306 , H01L31/0224 , H01L31/0352 , H01L31/10 , H01L31/105
Abstract: In a semiconductor photodetector 1 according to the present invention, flat surfaces of three steps with different heights are formed in a top surface portion of a semi-insulating GaAs substrate 2 . An n-type GaAs layer 3 , an i-type GaAs layer 4 , and a p-type GaAs layer 5 are successively deposited on the lower step surface formed in a central region of the semi-insulating GaAs substrate 2 . Furthermore, a p-side ohmic electrode 6 is provided astride and above a flat surface formed by the p-type GaAs layer 5 and the upper step surface of the semi-insulating GaAs substrate 2 , and an n-side ohmic electrode 7 is provided astride and above a flat surface formed by the n-type GaAs layer 3 and the middle step surface of the semi-insulating GaAs substrate 2.
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公开(公告)号：DE68911781D1
公开(公告)日：1994-02-10
申请号：DE68911781
申请日：1989-07-28
Applicant: HAMAMATSU PHOTONICS KK
Inventor： NAKAJIMA KAZUTOSHI , KAN HIROFUMI , SUGIMOTO KENICHI , MIZUSHIMA YOSHIHIKO , HIROHATA TORU , IIDA TAKASHI , WARASHINA YOSHIHISA
Abstract: An optical memory circuit comprises two photodetectors, and an intermediate signal conductor for connecting the two photodetectors, wherein the two photodetectors and the signal conductor are connected in series in a closed circuit, and the signal conductor has such capacitance that a time constant of a potential of the signal conductor has such a large value as allows charges to be stored in the signal conductor when an optical write signal is incident on one photodetector whereas allows stored charges to be released from the signal conductor when an optical read signal is incident on the other photodetector.
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Patent Agency Ranking
公开(公告)号：DE112014002145T5
公开(公告)日：2015-12-31
申请号：DE112014002145
申请日：2014-01-29
Applicant: HAMAMATSU PHOTONICS KK
Inventor： NAKAJIMA KAZUTOSHI , NIIGAKI MINORU , HIROHATA TORU , YAMASHITA HIROYUKI , AKAHORI WATARU
IPC: H01L31/0264 , G01J1/02
Abstract: Ein Fotodetektor 1A umfasst ein optisches Element 10A zur Erzeugung einer elektrischen Feldkomponente in einer vorbestimmten Richtung, wenn Licht entlang der vorbestimmten Richtung darauf einfällt, wobei das optische Element 10A eine Struktur aufweist, die erste Gebiete und zweite Gebiete, die mit Bezug auf die ersten Gebiete entlang einer Ebene senkrecht zu der vorbestimmten Richtung in regelmäßigen Abständen angeordnet sind, umfasst; und eine Halbleiterschicht 40, die in Bezug auf das optische Element 10A auf der anderen Seite gegenüberliegend von einer Seite in der vorbestimmten Richtung angeordnet ist, und die einen Halbleitermehrschichtkörper 42 zur Erzeugung eines Stroms entsprechend der durch das optische Element erzeugten elektrischen Feldkomponente in der vorbestimmten Richtung aufweist; wobei jedes Endteil auf der anderen Seite der zweiten Gebiete näher an der anderen Seite angeordnet ist als jedes Endteil auf der anderen Seite der ersten Gebiete; und wobei jedes erste Gebiet aus einem dielektrischen Körper gebildet ist, dessen Brechungsindex größer ist als der von jedem zweiten Gebiet.
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公开(公告)号：DE68911781T2
公开(公告)日：1994-04-14
申请号：DE68911781
申请日：1989-07-28
Applicant: HAMAMATSU PHOTONICS KK
Inventor： NAKAJIMA KAZUTOSHI , KAN HIROFUMI , SUGIMOTO KENICHI , MIZUSHIMA YOSHIHIKO , HIROHATA TORU , IIDA TAKASHI , WARASHINA YOSHIHISA
Abstract: An optical memory circuit comprises two photodetectors, and an intermediate signal conductor for connecting the two photodetectors, wherein the two photodetectors and the signal conductor are connected in series in a closed circuit, and the signal conductor has such capacitance that a time constant of a potential of the signal conductor has such a large value as allows charges to be stored in the signal conductor when an optical write signal is incident on one photodetector whereas allows stored charges to be released from the signal conductor when an optical read signal is incident on the other photodetector.
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公开(公告)号：DE3939300A1
公开(公告)日：1990-10-11
申请号：DE3939300
申请日：1989-11-28
Applicant: HAMAMATSU PHOTONICS KK
Inventor： MIZUSHIMA YOSHIHIKO , NAKAJIMA KAZUTOSHI , HIROHATA TORU , IIDA TAKASHI , WARASHINA YOSHIHISA , SUGIMOTO KENICHI , KAN HIROFUMI
IPC: H03K19/14
Abstract: A plurality of ultra-high speed light receiving elements are provided each of which has two rectifier junctions being connected to each other opposite in polarity and has a substantially symmetrical electrode arrangement. A bias voltage is applied to each of the light receiving elements from one or a plurality of power sources. Electrical signals produced by the light receiving elements in response to input optical pulse signals are superposed on one another to produce one or a plurality of output electrical signals representing a predetermined logic operation with respect to the input optical pulse signals. Depending on the arrangement of its elements, the optical logic operation system functions as an OR circuit, AND circuit, NOT circuit, EXCLUSIVE OR circuit, or half-adder circuit.
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9.发明公开
公开(公告)号：EP2056492A4
公开(公告)日：2016-07-06
申请号：EP07791069
申请日：2007-07-20
Applicant: HAMAMATSU PHOTONICS KK
Inventor： NAKAJIMA KAZUTOSHI , HANAJIMA MASAAKI , AMANO YOSHIHISA , OHSUGI AKIRA , WANG YOU , YAMAUCHI TOYOHIKO , NAKAMURA TOMONORI
IPC: G02B6/00 , H04B10/11 , B61L3/06 , G02B6/28 , G02B6/42 , H04B10/112 , H04B10/118 , H04B10/25 , H04B10/2581 , H04B10/40
CPC classification number: G02B6/4201 , B61L3/065 , G02B6/2852 , H04B10/1125
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公开(公告)号：EP2219266A4
公开(公告)日：2015-05-06
申请号：EP08849464
申请日：2008-10-24
Applicant: HAMAMATSU PHOTONICS KK
Inventor： KUROYANAGI KAZUYOSHI , NAKAJIMA KAZUTOSHI
CPC classification number: H01Q1/44 , H01L31/0224 , H01L31/0304 , H01L31/09 , H01Q1/38 , H01Q9/16 , H01Q9/28 , H01Q21/062 , H01S1/02 , Y02E10/544
Abstract: This invention relates to a photoconductive antenna element having a structure capable of preventing element characteristics from deteriorating and attain a smaller size at the same time. This photoconductive antenna element (17) comprises a pair of electrodes (21) formed on a semiconductor layer (19). Each electrode (21) is constituted by an antenna part (22), pad parts (23), and a line part (24) connecting them, while the line part (24) includes a parallel portion (24a) extending from the antenna part (22). In the line part (24) of one electrode (21), a portion other than the antenna region (A) is bent opposite to the other electrode (21). In the line part (24) of the other electrode (21), a portion other than the antenna region (A) is bent opposite to the one electrode (21). This structure can prevent the photoconductive antenna element (17) from deteriorating its element characteristics and make it smaller.
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