公开(公告)号：WO2017131641A1

公开(公告)日：2017-08-03

申请号：PCT/US2016/014946

申请日：2016-01-26

Applicant: HEWLETT-PACKARD ENTERPRISE DEVELOPMENT LP ,  KAPOOR, Mark V. ,  ENGLER, David ,  KIDD, Owen

Inventor： KAPOOR, Mark V. ,  ENGLER, David ,  KIDD, Owen

IPC: G06F3/044

CPC classification number: H03K17/962 ,  H03K17/955 ,  H03K2017/9602 ,  H03K2217/94021

Abstract: A capacitive touch sensor detects proximity of touch presence. The capacitive touch sensor includes a conductive surface at an edge of a substrate thereof.

Abstract translation: 电容式触摸传感器检测触摸存在的接近度。 电容式触摸传感器在其衬底的边缘处包括导电表面。

公开(公告)号：WO2016114775A1

公开(公告)日：2016-07-21

申请号：PCT/US2015/011434

申请日：2015-01-14

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： KAPOOR, Mark V. ,  ENGLER, David W. ,  RAYMOND, Patrick A.

IPC: H05K3/46

CPC classification number: H05K1/183 ,  H05K1/0298 ,  H05K2201/1003

Abstract: A method related to removing layers in a multi-layered PCB is described. The method includes removing one of more layers of a multi-layered printed circuit board (PCB) layer via material removal techniques. The removal of the layers reduces the thickness of the multi-layered PCB in a section while the thickness in another section of the PCB is maintained. The method includes forming a recess in the section of the multi-layered PCB to provide additional spacing on the multi-layered PCB. The method further includes placing components in the recessed section of the multi-layered PCB.

Abstract translation: 描述了涉及去除多层PCB中的层的方法。 该方法包括通过材料去除技术去除多层印刷电路板（PCB）层中的多层。 这些层的去除减少了部分中多层PCB的厚度，同时保持了PCB的另一部分中的厚度。 该方法包括在多层PCB的部分中形成凹槽，以在多层PCB上提供额外的间隔。 该方法还包括将组件放置在多层PCB的凹陷部分中。

公开(公告)号：WO2017007454A1

公开(公告)日：2017-01-12

申请号：PCT/US2015/039348

申请日：2015-07-07

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： KAPOOR, Mark V. ,  MCAFEE, Martin E. ,  WIENCHOL, Hermann

IPC: G01R23/12 ,  G01R19/252

CPC classification number: G06F1/26

Abstract: Example implementations relate to phase shedding. For example, phase shedding can include receiving performance and active status information associated with each of a plurality of phases within a system and systematically shedding a phase from within the plurality of phases based on the received information.

Abstract translation: 示例实现涉及相位脱落。 例如，相位脱落可以包括接收与系统内的多个相位中的每一个相关联的性能和活动状态信息，并且基于接收到的信息系统地从多个阶段中切出相位。

公开(公告)号：WO2016122461A1

公开(公告)日：2016-08-04

申请号：PCT/US2015/013080

申请日：2015-01-27

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： ENGLER, David W. ,  ENGLER, Jennifer Kleiman ,  KAPOOR, Mark V.

IPC: G11C5/02 ,  G11C5/14

CPC classification number: G06F1/185 ,  G11C5/04 ,  H05K1/0262 ,  H05K2201/10159

Abstract: Example implementations relate to an in-line memory module carrier for an M.2 form factor. For example, an in-line memory module carrier can include a circuit board having an in-line memory module form factor to receive an M.2 form factor module, an edge interface on a longitudinal edge of the circuit board for transmission of power between the M.2 form factor module and a host connector, the edge interface having an electrical contact, and a power regulator to receive a first voltage from the host connector and convert the first voltage to a second voltage to power the M.2 form factor module.

Abstract translation: 示例实现涉及用于M.2形状因子的在线存储器模块载体。 例如，在线存储器模块载体可以包括具有串行存储器模块形状因子以接收M.2形状因子模块的电路板，在电路板的纵向边缘上的边缘接口，用于在 M.2形状因子模块和主机连接器，边缘接口具有电触点，以及功率调节器，用于从主机连接器接收第一电压，并将第一电压转换为第二电压以对M.2形状因子供电 模块。