公开(公告)号：WO2019209686A1

公开(公告)日：2019-10-31

申请号：PCT/US2019/028462

申请日：2019-04-22

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： SHARMA, Amit S. ,  STRACHAN, John Paul ,  FIORENTINO, Marco

IPC: G02B26/10 ,  G01S7/481

Abstract: Systems and methods are provided for processing an optical signal. An example system may include a source disposed on a substrate and capable of emitting the optical signal. A first waveguide is formed in the substrate to receive the optical signal. A first coupler is disposed on the substrate to receive a reflected portion of the optical signal. A second waveguide is formed in the substrate to receive the reflected portion from the first coupler. A second coupler is formed in the substrate to mix the optical signal and the reflected portion to form a mixed signal. Photodetectors are formed in the substrate to convert the mixed signal to an electrical signal. A processor is electrically coupled to the substrate and programmed to convert the electrical signal from a time domain to a frequency domain to determine a phase difference between the optical signal and the reflected portion.

公开(公告)号：WO2019212466A1

公开(公告)日：2019-11-07

申请号：PCT/US2018/030125

申请日：2018-04-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： STRACHAN, John Paul ,  MILOJICIC, Dejan S. ,  FOLTIN, Martin ,  CHALAMALASETTI, Sai Rahul ,  SHARMA, Amit S.

IPC: G06F15/78 ,  G06F15/163

Abstract: In some examples, a device includes a first processing core comprising a resistive memory array to perform an analog computation, and a digital processing core comprising a digital memory programmable with different values to perform different computations responsive to respective different conditions. The device further includes a controller to selectively apply input data to the first processing core and the digital processing core.

公开(公告)号：WO2019209330A1

公开(公告)日：2019-10-31

申请号：PCT/US2018/029902

申请日：2018-04-27

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： SHARMA, Amit S. ,  STRACHAN, John, Paul ,  FOLTIN, Martin

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/732

Abstract: Devices and methods are provided. In one aspect, a device for driving a memristor array includes a substrate including a well having a bottom layer, a first wall and a second wall. The substrate is formed of a strained layer of a first semiconductor material. A vertical JFET is formed in the well. The vertical JFET includes a vertical gate region formed in a middle portion of the well with a gate region height less than a depth of the well. A channel region is formed of an epitaxial layer of a second semiconductor wrapped around the vertical gate region. Vertical source regions are formed on both sides of a first end of the vertical gate region, and vertical drain regions are formed on both sides of a second end of the vertical gate region.