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    POST PACKAGE REPAIR FOR MAPPING TO A MEMORY FAILURE PATTERN
    1.
    发明申请
    POST PACKAGE REPAIR FOR MAPPING TO A MEMORY FAILURE PATTERN 审中-公开
    用于映射到存储器故障模式的POST封装修复

    公开(公告)号：WO2017030564A1

    公开(公告)日：2017-02-23

    申请号：PCT/US2015/045683

    申请日：2015-08-18

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： POPE, Eric L. ,  FAASSE, Scott P.

    IPC: G11C29/08

    CPC classification number: G11C29/76 ,  G11C29/10 ,  G11C29/24 ,  G11C29/44 ,  G11C29/4401 ,  G11C2029/4402

    Abstract: In one example in accordance with the present disclosure, a method includes mapping, using post-package repair, an address associated with a first memory row of a computing device to a spare memory row of the computing device, wherein the spare memory row has a memory failure pattern, and reading data from the spare memory row.

    Abstract translation: 在根据本公开的一个示例中，一种方法包括使用后封装修复将与计算设备的第一存储器行相关联的地址映射到计算设备的备用存储器行，其中备用存储器行具有 内存故障模式，以及从备用内存行读取数据。

    PHYSICAL MEMORY REGION BACKUP OF A VOLATILE MEMORY TO A NON-VOLATILE MEMORY
    2.
    发明申请
    PHYSICAL MEMORY REGION BACKUP OF A VOLATILE MEMORY TO A NON-VOLATILE MEMORY 审中-公开
    易失性存储器的物理存储区域备份到非易失性存储器

    公开(公告)号：WO2017039598A1

    公开(公告)日：2017-03-09

    申请号：PCT/US2015/047660

    申请日：2015-08-31

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： BENEDICT, Melvin K. ,  POPE, Eric L.

    IPC: G06F12/16 ,  G06F11/14

    CPC classification number: G06F11/14 ,  G06F11/1441 ,  G06F12/16

    Abstract: In one example in accordance with the present disclosure, a system for backup of a physical memory region of volatile memory. The system may include: a non-volatile memory, a volatile memory, at least one processor to: execute an application that indicates a virtual memory region stored in the volatile memory, wherein the virtual memory region is associated with an application, determine a corresponding physical memory region of the volatile memory for backup based on the indicated virtual memory region, and at least one memory controller to: receive a backup signal for the physical memory region of the volatile memory, and responsive to receiving the backup signal, backup up the physical memory region of the volatile memory to a memory region of the non-volatile memory.

    Abstract translation: 在根据本公开的一个示例中，用于备份易失性存储器的物理存储器区域的系统。 所述系统可以包括：非易失性存储器，易失性存储器，至少一个处理器，用于：执行指示存储在所述易失性存储器中的虚拟存储器区域的应用，其中所述虚拟存储器区域与应用相关联， 用于基于所指示的虚拟存储器区域进行备份的易失性存储器的物理存储器区域，以及至少一个存储器控制器，用于：接收用于易失性存储器的物理存储器区域的备份信号，并且响应于接收备份信号，备份 易失性存储器的物理存储器区域到非易失性存储器的存储器区域。

    COMMUNICATION INTERFACE FOR MEMORY DEVICE
    3.
    发明申请
    COMMUNICATION INTERFACE FOR MEMORY DEVICE 审中-公开
    用于存储器件的通信接口

    公开(公告)号：WO2016175793A1

    公开(公告)日：2016-11-03

    申请号：PCT/US2015/028256

    申请日：2015-04-29

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： BACCHUS, Reza M. ,  POPE, Eric L. ,  LOH, Sze Hau

    IPC: G06F12/06 ,  G06F12/08

    CPC classification number: G06F13/16 ,  G06F13/1694 ,  Y02D10/14

    Abstract: A memory device includes a storage array, a first differential interface coupled to the storage array and including a first bidirectional signal channel to facilitate communication with an upstream device, and a second differential interface coupled to the first differential interface and including a second bidirectional signal channel to facilitate communication with a downstream device.

    Abstract translation: 存储器件包括存储阵列，耦合到存储阵列的第一差分接口，并且包括第一双向信号通道以促进与上游设备的通信，以及耦合到第一差分接口的第二差分接口，并且包括第二双向信号通道 以便于与下游设备的通信。

    SCRUBBING DATA IN A MEMORY DEVICE
    5.
    发明申请
    SCRUBBING DATA IN A MEMORY DEVICE 审中-公开
    在存储设备中擦洗数据

    公开(公告)号：WO2017065802A1

    公开(公告)日：2017-04-20

    申请号：PCT/US2015/055976

    申请日：2015-10-16

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： BACCHUS, Reza M. ,  BENEDICT, Melvin K. ,  POPE, Eric L.

    IPC: G11C11/406 ,  G06F11/10

    CPC classification number: G06F11/106 ,  G11C7/04 ,  G11C11/4076

    Abstract: A memory device includes storage locations to store data, and an internal controller to perform scrubbing of a portion of the data stored by at least one storage location of the storage locations. The memory device also includes an interface to communicate non-deterministically over a communication bus with a memory controller.

    Abstract translation: 存储器设备包括存储位置以存储数据，以及内部控制器执行对存储位置的至少一个存储位置存储的数据的一部分的擦除。 存储设备还包括通过通信总线与存储控制器进行非确定性通信的接口。

    ROW REPAIR OF CORRECTED MEMORY ADDRESS
    6.
    发明申请
    ROW REPAIR OF CORRECTED MEMORY ADDRESS 审中-公开
    修正存储器地址的行修复

    公开(公告)号：WO2017131700A1

    公开(公告)日：2017-08-03

    申请号：PCT/US2016/015373

    申请日：2016-01-28

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： POPE, Eric L.

    IPC: G11C29/44 ,  G11C29/52

    CPC classification number: G11C29/44 ,  G11C29/46 ,  G11C29/52 ,  G11C29/70 ,  G11C2029/0409 ,  G11C2029/0411 ,  G11C2029/4402

    Abstract: Addresses of memory cells that have errors corrected by error correction operations are evaluated to identify a failed row of memory. A post package repair is implemented on the failed row with a method comprising obtaining indications of the error correction operations, logging addresses of memory cells having errors corrected by the error correction operations, evaluating the addresses to identify the failed row, and implementing the post package repair operation on the failed row.

    Abstract translation: 评估通过纠错操作纠正了错误的存储器单元的地址以识别存储器的失败行。 利用包括获得错误校正操作的指示，记录具有由纠错操作校正的错误的存储器单元的地址，评估地址以识别失败的行以及实现后置封装的方法来在失败的行上实施后封装修复 修复失败的行上的操作。

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