-
Patent Agency Ranking
公开(公告)号：WO03017326A3
公开(公告)日：2003-05-15
申请号：PCT/US0225640
申请日：2002-08-12
Applicant: HONEYWELL INT INC , HAJI-SHEIKH MICHAEL J , BIARD JAMES R , HAWKINS ROBERT M , RABINOVICH SIMON , GUENTER JAMES K
Inventor： HAJI-SHEIKH MICHAEL J , BIARD JAMES R , HAWKINS ROBERT M , RABINOVICH SIMON , GUENTER JAMES K
CPC classification number: G01R31/275 , G01R31/2831 , G01R31/2863 , G01R31/2872 , G01R31/2874 , G01R31/2884 , H01S5/0021 , H01S5/005 , H01S5/423
Abstract: Methods of conducting wafer level burn-in (WLBI) of semiconductor devices are presented wherein systems are provided having at least two electrodes (210, 215). Electrical bias (920) and/or thermal power (925) is applied on each side of a wafer (100) having back and front electrical contacts for semiconductor devices borne by the wafer. A pliable conductive layer (910) is described for supplying pins on the device side of a wafer with electrical contact and/or also for providing protection to the wafer from mechanical pressure being applied to its surfaces. Use of a cooling system (950) is also described for enabling the application of a uniform temperature to a wafer undergoing burn-in. Wafer level burn-in is performed by applying electrical and physical contact (915) using an upper contact plate to individual contacts for the semiconductor devices ; applying electrical and physical contact using a lower contact plate (910) to a substrate surface of said semiconductor wafer ; providing electrical power (920) to said semiconductor devices through said upper and lower second contact plates from a power source coupled to said upper and lower contacts plates ; monitoring and controlling electrical power (935) to said semiconductor devices for a period in accordance with a specified burn-in criteria ; removing electrical power at completion of said period (955) ; and removing electrical and physical contact to said semiconductor wafer (965).
Abstract translation: 提供了进行半导体器件的晶片级老化（WLBI）的方法，其中提供具有至少两个电极（210,215）的系统。 电晶体（920）和/或热功率（925）施加在具有由晶片承载的半导体器件的背面和前部电触点的晶片（100）的每一侧上。 描述了一种柔性导电层（910），用于在具有电接触的晶片的器件侧上提供引脚和/或用于为施加到其表面的机械压力提供对晶片的保护。 还描述了使用冷却系统（950），以使得能够对经历老化的晶片施加均匀的温度。 通过使用上接触板向半导体器件的单个触点施加电和物理接触（915）来执行晶片级老化; 使用下接触板（910）将电和物理接触施加到所述半导体晶片的衬底表面; 通过所述上和下第二接触板从耦合到所述上和下接触板的电源向所述半导体器件提供电力（920）; 根据指定的老化标准对所述半导体器件监测和控制电力（935）一段时间; 在所述期间完成时移除电力（955）; 以及去除与所述半导体晶片（965）的电和物理接触。
-
公开(公告)号：AU2002323126A1
公开(公告)日：2003-03-03
申请号：AU2002323126
申请日：2002-08-12
Applicant: HONEYWELL INT INC
Inventor： HAWKINS ROBERT M , HAJI-SHEIKH MICHAEL J , RABINOVICH SIMON , BIARD JAMES R , GUENTER JAMES K
Abstract: Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a substrate (1520), at least one active layer (1565) and a surface layer (1510), and electrical contacts (1515) formed on said surface layer (1510). Current control can be achieved with the formation of trenches (1525) around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants (1530) can be placed into trenches (1525) and/or sacrificial layers (1540) can be formed between electronic contacts (1515). Trenches control current by promoting current flow within active (e.g., conductive) regions (1560) and impeding current flow through inactive (e.g., nonconductive) regions (1550). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
-
公开(公告)号：CA2457691A1
公开(公告)日：2003-02-27
申请号：CA2457691
申请日：2002-08-12
Applicant: HONEYWELL INT INC
Inventor： GUENTER JAMES K , BIARD JAMES R , RABINOVICH SIMON , HAWKINS ROBERT M , HAJI-SHEIKH MICHAEL J
Abstract: Systems for wafer level burn-in (WLBI) of semiconductor devices (210, 215) a re presented. Systems having at least two electrodes for the application of electrical bias and/or thermal power on each side of a wafer (100) having ba ck (105) and front (110) electrical contacts for semiconductor devices borne by the wafer (100) is described. Methods of wafer level burnin using the system are also described. Furthermore, a pliable conductive layer (220) is describ ed for supplying pins or contacts (110) on device side of a wafer with electric al contact. The pliable conductive layer (220) can allow for an effective serie s R in each of the devices borne by the wafer (100), thus helping keep voltage bias level consistent. The pliable conductive layer can also prevent damage to a wafer when pressure is applied to it by chamber contacts (210, 215) and pressure onto surfaces of the wafer (100) during burn-in operations. A cooli ng system (660) is also described for enabling the application of a uniform temperature to the wafer (100) undergoing burn-in.
-
公开(公告)号：AU2002356039A1
公开(公告)日：2003-03-03
申请号：AU2002356039
申请日：2002-08-12
Applicant: HONEYWELL INT INC
Inventor： BIARD JAMES R , RABINOVICH SIMON , HAWKINS ROBERT M , GUENTER JAMES K , HAJI-SHEIKH MICHAEL J
Abstract: Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a substrate (1520), at least one active layer (1565) and a surface layer (1510), and electrical contacts (1515) formed on said surface layer (1510). Current control can be achieved with the formation of trenches (1525) around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants (1530) can be placed into trenches (1525) and/or sacrificial layers (1540) can be formed between electronic contacts (1515). Trenches control current by promoting current flow within active (e.g., conductive) regions (1560) and impeding current flow through inactive (e.g., nonconductive) regions (1550). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
-
公开(公告)号：CA2457680A1
公开(公告)日：2003-02-27
申请号：CA2457680
申请日：2002-08-12
Applicant: HONEYWELL INT INC
Inventor： RABINOVICH SIMON , GUENTER JAMES K , BIARD JAMES R , HAWKINS ROBERT M , HAJI-SHEIKH MICHAEL J
Abstract: Methods of conducting wafer level burn-in (WLBI) of semiconductor devices ar e presented wherein systems are provided having at least two electrodes (210, 215). Electrical bias (920) and/or thermal power (925) is applied on each si de of a wafer (100) having back and front electrical contacts for semiconductor devices borne by the wafer. A pliable conductive layer (910) is described fo r supplying pins on the device side of a wafer with electrical contact and/or also for providing protection to the wafer from mechanical pressure being applied to its surfaces. Use of a cooling system (950) is also described for enabling the application of a uniform temperature to a wafer undergoing burn - in. Wafer level burn-in is performed by applying electrical and physical contact (915) using an upper contact plate to individual contacts for the semiconductor devices ; applying electrical and physical contact using a low er contact plate (910) to a substrate surface of said semiconductor wafer ; providing electrical power (920) to said semiconductor devices through said upper and lower second contact plates from a power source coupled to said upper and lower contacts plates ; monitoring and controlling electrical powe r (935) to said semiconductor devices for a period in accordance with a specified burn-in criteria ; removing electrical power at completion of said period (955) ; and removing electrical and physical contact to said semiconductor wafer (965).
-
-
-
-
Search Results
5
records
(took 0.024 seconds)
