公开(公告)号：US3836992A

公开(公告)日：1974-09-17

申请号：US34181473

申请日：1973-03-16

Applicant: IBM

Inventor： ABBAS S ,  BARILE C ,  LANE R ,  LIU P

IPC: G11C17/00 ,  G11C16/04 ,  H01L21/8247 ,  H01L29/417 ,  H01L29/788 ,  H01L29/792 ,  H01L11/14

CPC classification number: G11C16/0433 ,  H01L29/7886

Abstract: A read-mostly memory cell is disclosed comprising a floating gate avalanche injection field effect transistor storage device equipped with an erasing electrode. The memory portion of the erasable storage devices comprises a P channel FET having a floating polycrystalline silicon gate separated from an N-doped substrate by a layer of silicon dioxide. The erasing portion of the device comprises an erasing electrode separated from the polycrystalline silicon floating gate by a thermally grown layer of silicon dioxide having a leakage characteristic which is low in the presence of low electrical fields and high in the presence of high electrical fields. The floating gate is heavily doped with boron which also partially dopes the thermally grown silicon dioxide layer. The floating gate is charged negatively by avalanche breakdown of the FET drain while the erase gate is grounded to the substrate. The floating gate is discharged (erased) upon the application of a positive pulse to the erase electrode with respect to the semiconductor substrate causing electrodes on the charged floating gate to leak through the thermal oxide to the erasing electrode.

Abstract translation: 公开了一种读出多数的存储单元，其包括配备有擦除电极的浮栅雪崩注入场效应晶体管存储装置。 可擦除存储装置的存储部分包括具有通过二氧化硅层与N掺杂衬底分离的浮置多晶硅栅极的P沟道FET。 器件的擦除部分包括通过热存储二氧化硅层与多晶硅浮置栅极分离的擦除电极，其具有在存在低电场的情况下具有低泄漏特性并且在存在高电场的情况下高的漏电特性。 浮置栅极重掺杂硼，其也部分地掺杂热生长的二氧化硅层。 浮动栅极由FET漏极的雪崩击穿负电，而擦除栅极接地到衬底。 相对于半导体衬底向擦除电极施加正脉冲时，浮栅被放电（擦除），使得带电浮栅上的电极通过热氧化物泄漏到擦除电极。

公开(公告)号：US3717852A

公开(公告)日：1973-02-20

申请号：US3717852D

申请日：1971-09-17

Applicant: IBM

Inventor： ABBAS S ,  STERN P

IPC: G11C17/06 ,  G11C11/30 ,  G11C16/02 ,  G11C17/14 ,  H01L23/525 ,  G11C17/00 ,  G11C11/36

CPC classification number: G11C16/02 ,  H01L23/525 ,  H01L2924/0002 ,  Y10S148/055 ,  Y10S257/926 ,  H01L2924/00

Abstract: An electronically rewritable read-only memory comprising an integrated semiconductor array of P-N junctions formed in a semiconductor substrate. A dielectric film is formed on the surface of the substrate on top of which a thin metallic film is deposited. The dielectric is thinner above an active region of each of the junctions than it is above the other regions of the substrate. When a suitable voltage is applied across the metallic film and dielectric, the metallic film diffuses through the dielectric film at the thinner areas, thereby forming ohmic via connections with the active junction regions. At the same time, the dielectric ''''self-heals'''' i.e., the via connections are disconnected from the metallic film around the periphery of the thin areas of the dielectric. A second layer of metallization over the metallic film establishes conductive contact between the layer and the active junction region. The contacts can be broken at selected junctions by passing a current through the diffused metallization. The contacts can be reestablished at selected junctions by applying a suitable healing voltage across the metallic film and the dielectric.

Abstract translation: 一种电子可重写只读存储器，包括形成在半导体衬底中的P-N结的集成半导体阵列。 在基板的表面上形成介电膜，在该表面上沉积有薄的金属膜。 电介质在每个接合点的有效区域之上比在衬底的其它区域上方更薄。 当跨金属膜和电介质施加合适的电压时，金属膜在较薄的区域上扩散通过电介质膜，由此与有源结区域形成欧姆通孔连接。 同时，电介质“自愈”即通孔连接部分与电介质的薄区域周围的金属膜断开连接。 金属膜上的第二层金属化层在层与有源结区之间形成导电接触。 通过使电流通过扩散金属化，可以在所选择的接合点处破坏接触。 通过在金属膜和电介质上施加适当的愈合电压，可以在选定的接合处重新建立触点。