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公开(公告)号：WO0208904A3
公开(公告)日：2002-05-02
申请号：PCT/GB0102984
申请日：2001-07-05
Inventor： ADAMS ROBERT DEAN , ECKENRODE THOMAS , GREGOR STEVEN , ZARRINEH KAMRAN
CPC classification number: G11C29/16 , G11C2029/0401
Abstract: The functionality of a programmable memory built-in self-test (BIST) arrangement for testing an embedded memory structure of an integrated circuit is extended to system level testing to ascertain operability of the system after the integrated circuits and boards including them have been placed in service in larger systems, by generating default test signals which are loaded in an instruction store module when test instructions are not provided from an external tester. This additional utility of the BIST arrangement, increases efficiency of chip space utilization and improves the system level test. Loading of test instructions from an external tester during chip manufacture and/or board assembly is unaffected.
Abstract translation: 用于测试集成电路的嵌入式存储器结构的可编程存储器内置自检（BIST）布置的功能被扩展到系统级测试，以在集成电路和包括它们的板被放置在其中之后确定系统的可操作性 通过生成在外部测试仪不提供测试指令时加载到指令存储模块中的默认测试信号，可以在更大的系统中进行服务。 BIST安排的这一附加功能可以提高芯片空间利用率，提高系统级测试。 在芯片制造和/或电路板组装期间从外部测试仪装载测试指令不受影响。
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公开(公告)号：JPH08328964A
公开(公告)日：1996-12-13
申请号：JP12731896
申请日：1996-05-22
Applicant: IBM
Inventor： ADAMS ROBERT DEAN , CONNOR JOHN , KOCH GARRETT STEPHEN , TERNULLO LUIGI JR
Abstract: PROBLEM TO BE SOLVED: To provide a device for testing a memory having a write cycle and read cycle. SOLUTION: A BIST state machine 60 and XOR circuit 68 change the data impressed upon the DI port of a memory to a value which is different from that of the data stored at a currently addressed memory position in a read cycle. In addition, the value of anticipated data generated by the BIST becomes different front that of the data on the DI port side of the memory, but the same as that of the data stored at the current memory address. When this constitution is used, such a flash through defect which could not be detected with the conventional BIST machine becomes detectable.
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公开(公告)号：AT260484T
公开(公告)日：2004-03-15
申请号：AT01943709
申请日：2001-07-05
Applicant: IBM
Inventor： ADAMS ROBERT DEAN , ECKENRODE THOMAS , GREGOR STEVEN , ZARRINEH KAMRAN
Abstract: The functionality of a programmable memory built-in self-test (BIST) arrangement for testing an embedded memory structure of an integrated circuit is extended to system level testing to ascertain operability of the system after the integrated circuits and boards including them have been placed in service in larger systems, by generating default test signals which are loaded in an instruction store module when test instructions are not provided from an external tester. This additional utility of the BIST arrangement, increases efficiency of chip space utilization and improves the system level test. Loading of test instructions from an external tester during chip manufacture and/or board assembly is unaffected.
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