公开(公告)号：JPH10289197A

公开(公告)日：1998-10-27

申请号：JP9034698

申请日：1998-04-02

Applicant: IBM

Inventor： ARIMILLI BABA ,  KAISER JOHN MICHAEL ,  KIM KYONGMEE L ,  MAULE WARREN EDWARD

IPC: G06F13/36 ,  G06F12/08 ,  G06F12/0879

Abstract: PROBLEM TO BE SOLVED: To attain the burst transfer of processor data to an I/O device by performing the intermediate cache emulation logic to snatch and process the processor commands requesting the communication with the I/O device. SOLUTION: The processors 10a to 10c control the accesses to a system memory card 46 and an I/O mezzanine bus 36 for a memory/I/O bus controller 30. The bus 36 is connected to one or more I/O bridges 40 via the data links 38a and 38b. The bridges 40 snatch the trigger commands, and the processors 10a to 10c request the communication with an I/O device 60. The I/O bridges 40a and 40b perform the intermediate cache emulation logic to attain the emulation type cache burst transfer of data to the device 60 via an I/O bus 50.

公开(公告)号：SG70629A1

公开(公告)日：2000-02-22

申请号：SG1998000575

申请日：1998-03-17

Applicant: IBM

Inventor： ARIMILLI BABA ,  KAISER JOHN MICHAEL ,  KIM KYONGMEE L ,  MAULE WARREN EDWARD

IPC: G06F13/36 ,  G06F12/08 ,  G06F12/0879