公开(公告)号：GB2606596A

公开(公告)日：2022-11-16

申请号：GB202114616

申请日：2021-10-13

Applicant: IBM

Inventor： ARNON AMIR ,  ANDREW STEPHEN CASSIDY ,  NATHANIEL JOSEPH MCCLATCHEY ,  JUN SAWADA ,  DHARMENDRA S MODHA ,  RATHINAKUMAR APPUSWAMY

IPC: G06N3/063 ,  G06F7/544 ,  G06F9/30 ,  G06N3/04

Abstract: Chips supporting constant time program control of nested loops are provided. In various embodiments, a chip comprises at least one arithmetic-logic computing unit and a controller operatively coupled to the at least one arithmetic-logic computing unit. The controller is configured according to a program configuration, the program configuration comprising at least one inner loop and at least one outer loop. The controller is configured to cause the at least one arithmetic computing unit to execute a plurality of operations according to the program configuration. The controller is configured to maintain at least a first loop counter and a second loop counter, the first loop counter configured to count a number of executed iterations of the at least one outer loop, and the second loop counter configured to count a number of executed iterations of the at least one inner loop. The controller is configured to provide a first indication of whether the first loop counter corresponds to a last iteration and a second indication of whether the second loop counter corresponds to a last iteration. The controller is configured to alternatively increment, reset, or maintain each of the first and second loop counters according to the first and second indications.

公开(公告)号：GB2548194B

公开(公告)日：2020-02-26

申请号：GB201700228

申请日：2017-01-06

Applicant: IBM

Inventor： ARNON AMIR ,  ANTONIO JOSE JIMENO YEPES ,  JIANBIN TANG

IPC: G06N3/04 ,  H03M7/02

Abstract: Weighted population code in neuromorphic systems is provided. According to an embodiment, a plurality of input values is received. For each of the plurality of values, a plurality of spikes is generated. Each of the plurality of spikes has an associated weight. A consumption time is determined for each of the plurality of spikes. Each of the plurality of spikes is sent for consumption at its consumption time.

公开(公告)号：GB2553451A

公开(公告)日：2018-03-07

申请号：GB201716188

申请日：2016-01-22

Applicant: IBM

Inventor： ARNON AMIR ,  RATHINAKUMAR APPUSWAMY ,  PALLAB DATTA ,  BENJAMIN GORDON SHAW ,  MYRON DALE FLICKNER ,  PAUL MEROLLA ,  DHARMENDRA SHANTILAL MODHA

IPC: G06N3/04 ,  G06N3/10

Abstract: One embodiment of the invention provides a system for mapping a neural network onto a neurosynaptic substrate. The system comprises a metadata analysis unit for analyzing metadata information associated with one or more portions of an adjacency matrix representation of the neural network, and a mapping unit for mapping the one or more portions of the matrix representation onto the neurosynaptic substrate based on the metadata information.