公开(公告)号：DE3572244D1

公开(公告)日：1989-09-14

申请号：DE3572244

申请日：1985-03-29

Applicant: IBM DEUTSCHLAND ,  IBM

Inventor： ANDRUSCH GEORG ,  BAISCH JOACHIM ,  BARSUHN HORST DIPL ING ,  WERNICKE FRIEDRICH C DIPL ING ,  WIEDMANN SIEGFRIED K DR DIPL I

IPC: G11C29/00 ,  G11C11/401 ,  G11C29/02 ,  G11C29/50 ,  G11C29/56

公开(公告)号：CA1238124A

公开(公告)日：1988-06-14

申请号：CA499842

申请日：1986-01-17

Applicant: IBM

Inventor： ANDRUSCH GEORG ,  BAISCH JOACHIM ,  BARSUHN HORST ,  WERNICKE FRIEDRICH C ,  WIEDMANN SIEGFRIED K

IPC: G11C29/00 ,  G11C11/401 ,  G11C29/02 ,  G11C29/50 ,  G11C29/56 ,  G01R31/26

Abstract: STABILITY TESTING OF SEMICONDUCTOR MEMORIES Design/test technique to facilitate improved long-term stability testing of static memory arrays with high inherent data retention characteristics at extremely small standby current requirements. The test concept is based on the fact that defects in the standby condition system of a memory array have a bearing on the word line standby potential. Detection of word line potentials differing from their nominal value defined for the standby state, i.e. in the unselected operation mode, is accomplished by performing a disturb write operation into the partly or totally unselected array. As a result cells along a defect word line are less disturbed than those along a good one. This (inverted error pattern) is used for screening defect word lines which otherwise would show up as (long-term) data retention problems.