公开(公告)号：DE2811318A1

公开(公告)日：1979-09-27

申请号：DE2811318

申请日：1978-03-16

Applicant: IBM DEUTSCHLAND

Inventor： BARSUHN HORST ,  OLDERDISSEN ULRICH ,  SCHMIDT WERNER

IPC: G06F11/10 ,  G06F12/04 ,  G06F12/16 ,  G11C7/00 ,  G06F13/06 ,  G06F11/00

公开(公告)号：CA1238124A

公开(公告)日：1988-06-14

申请号：CA499842

申请日：1986-01-17

Applicant: IBM

Inventor： ANDRUSCH GEORG ,  BAISCH JOACHIM ,  BARSUHN HORST ,  WERNICKE FRIEDRICH C ,  WIEDMANN SIEGFRIED K

IPC: G11C29/00 ,  G11C11/401 ,  G11C29/02 ,  G11C29/50 ,  G11C29/56 ,  G01R31/26

Abstract: STABILITY TESTING OF SEMICONDUCTOR MEMORIES Design/test technique to facilitate improved long-term stability testing of static memory arrays with high inherent data retention characteristics at extremely small standby current requirements. The test concept is based on the fact that defects in the standby condition system of a memory array have a bearing on the word line standby potential. Detection of word line potentials differing from their nominal value defined for the standby state, i.e. in the unselected operation mode, is accomplished by performing a disturb write operation into the partly or totally unselected array. As a result cells along a defect word line are less disturbed than those along a good one. This (inverted error pattern) is used for screening defect word lines which otherwise would show up as (long-term) data retention problems.

公开(公告)号：FR2276659A1

公开(公告)日：1976-01-23

申请号：FR7516563

申请日：1975-05-23

Applicant: IBM

Inventor： BARSUHN HORST ,  GSCHWENDTNER JORG ,  HAUG WERNER O

IPC: G11C11/405 ,  G11C7/02 ,  G11C11/404 ,  G11C11/4097 ,  H01L27/07 ,  H01L27/108 ,  G11C11/40