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    APPARATUS AND METHOD FOR HANDLING DMA REQUESTS IN A VIRTUAL MEMORY ENVIRONMENT
    1.
    发明申请
    APPARATUS AND METHOD FOR HANDLING DMA REQUESTS IN A VIRTUAL MEMORY ENVIRONMENT 审中-公开
    在虚拟内存环境中处理DMA请求的装置和方法

    公开(公告)号：WO2007042428A2

    公开(公告)日：2007-04-19

    申请号：PCT/EP2006066999

    申请日：2006-10-03

    Applicant: IBM ,  IBM UK ,  BARTLEY GERALD KEITH ,  BORKENHAGEN JOHN MICHAEL ,  HOVIS WILLIAM PAUL ,  KOLZ DANIEL PAUL

    Inventor： BARTLEY GERALD KEITH ,  BORKENHAGEN JOHN MICHAEL ,  HOVIS WILLIAM PAUL ,  KOLZ DANIEL PAUL

    CPC classification number: G06F13/28

    Abstract: An apparatus includes a virtual memory manager that moves data from a first block (A) to a second block (B) in memory. When the virtual memory manager is ready to transfer data from the first block to the second block, a third, temporary block (C) of memory is defined. The translation table in a DMA controller is changed to point DMA transfers that target the first block to instead target the temporary block. The virtual memory manager then transfers data from the first block to the second block. When the transfer is complete, a check is made to see if the DMA transferred data to the temporary block while the data from the first block was being written to the second block. If so, the data written to the temporary block is written to the second block. A hardware register is preferably used to efficiently detect changes to the temporary block.

    Abstract translation: 一种装置包括将数据从第一块（A）移动到存储器中的第二块（B）的虚拟存储器管理器。 当虚拟存储器管理器准备好将数据从第一块传送到第二块时，定义了第三个临时块（C）。 将DMA控制器中的转换表更改为将目标为第一个块的DMA传输指向临时块。 然后，虚拟存储器管理器将数据从第一块传送到第二块。 当传输完成时，检查DMA是否将数据传输到临时块，而第一个块的数据正在写入第二个块。 如果是这样，则将写入临时块的数据写入第二块。 优选地使用硬件寄存器来有效地检测对临时块的改变。

    Structure and method for implementing power saving in addressing of dram architecture
    2.
    发明专利
    Structure and method for implementing power saving in addressing of dram architecture 审中-公开
    在DRAM架构寻址中实现节能的结构和方法

    公开(公告)号：JP2008234662A

    公开(公告)日：2008-10-02

    申请号：JP2008074311

    申请日：2008-03-21

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： GERMANN PHILIP RAYMOND ,  BORKENHAGEN JOHN M ,  BECKER DARRYL J ,  BARTLEY GERALD KEITH ,  HOVIS WILLIAM PAUL

    IPC: G06F12/06 ,  G06F1/32 ,  G11C11/401 ,  G11C11/407

    CPC classification number: Y02D10/13

    Abstract: PROBLEM TO BE SOLVED: To provide a structure and a method for implementing power saving in addressing of a DRAM device. SOLUTION: A random access memory device includes an array of individual memory cells arranged into rows and columns, and each memory cell has a corresponding access device. Assuming N as the number corresponding to the number of independently accessible partitions of the array, each row of the array further includes a corresponding plurality of N word lines, and each access device in a given row is coupled to only one of the N word lines of the rows. An address decoder communicating with the array receives a plurality of row address bits, and determines which of the N partitions in a requested row must be accessed on the requested row identified by the row address bits, and does not activate the access device within the selected row but not within the partition to be accessed. COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种用于在DRAM设备的寻址中实现省电的结构和方法。 解决方案：随机存取存储器件包括排列成行和列的各个存储单元的阵列，并且每个存储单元具有对应的存取设备。 假设N为与阵列的独立可访问分区的数量相对应的数字，阵列的每一行还包括相应的多个N个字线，并且给定行中的每个访问设备仅耦合到N个字线中的一个 的行。 与阵列通信的地址解码器接收多个行地址位，并且确定在所请求的行中必须在由行地址位标识的所请求的行上访问所述N个分区中的哪一个，并且不激活所选行中的访问设备 行，但不在要访问的分区内。 版权所有（C）2009，JPO＆INPIT

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