公开(公告)号：DE60302045T2

公开(公告)日：2006-07-20

申请号：DE60302045

申请日：2003-02-27

Applicant: IBM

Inventor： ABEL FRANCOIS ,  BENNER ALAN ,  DITTMANN GERO ,  HERKERSDORF ANDREAS

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：AT308185T

公开(公告)日：2005-11-15

申请号：AT03717246

申请日：2003-02-27

Applicant: IBM

Inventor： ABEL FRANCOIS ,  BENNER ALAN ,  DITTMANN GERO ,  HERKERSDORF ANDREAS

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08 ,  H04L12/56 ,  H04L29/06 ,  G06F15/80

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：AU2003221530A8

公开(公告)日：2003-09-16

申请号：AU2003221530

申请日：2003-02-27

Applicant: IBM

Inventor： DITTMANN GERO ,  ABEL FRANCOIS ,  HERKERSDORF ANDREAS ,  BENNER ALAN

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08 ,  H04L12/56 ,  G06F15/80 ,  H04L29/06

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：AU2003221530A1

公开(公告)日：2003-09-16

申请号：AU2003221530

申请日：2003-02-27

Applicant: IBM

Inventor： BENNER ALAN ,  DITTMANN GERO ,  HERKERSDORF ANDREAS ,  ABEL FRANCOIS

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08 ,  H04L12/56 ,  H04L29/06 ,  G06F15/80

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：DE60317890T2

公开(公告)日：2008-11-27

申请号：DE60317890

申请日：2003-03-31

Applicant: IBM

Inventor： ABEL FRANCOIS G ,  BENNER ALAN ,  BLANC ALAIN ,  COLMANT MICHEL ,  GUSAT MITCH ,  PORET MICHEL ,  SCHUMACHER NORBERT ,  VERHAPPEN MARK

IPC: H04L12/56 ,  H04Q11/04

Abstract: A communication system which consists of several modules—operating in parallel on segments of a packet—to increase speed and handling capacity. One module acts as master, the others are slave modules controlled by control signals derived by the master module. It is important that in each module the data segment and the respective control signal of each packet are correctly synchronized, because in large systems the data paths carrying packet segments and the control signal paths may have substantially different delays. The invention provides for measurement of the propagation delay differences and for introducing a controlled delay in each slave module, so that data segments and control signals can be correctly correlated by delaying either the one or the other. Synchronization packets are transmitted besides normal data packets, for obtaining time stamps which are used to determine the delay difference.

公开(公告)号：DE60317890D1

公开(公告)日：2008-01-17

申请号：DE60317890

申请日：2003-03-31

Applicant: IBM

Inventor： ABEL FRANCOIS G ,  BENNER ALAN ,  BLANC ALAIN ,  COLMANT MICHEL ,  GUSAT MITCH ,  PORET MICHEL ,  SCHUMACHER NORBERT ,  VERHAPPEN MARK

IPC: H04L12/56 ,  H04Q11/04

Abstract: A communication system which consists of several modules—operating in parallel on segments of a packet—to increase speed and handling capacity. One module acts as master, the others are slave modules controlled by control signals derived by the master module. It is important that in each module the data segment and the respective control signal of each packet are correctly synchronized, because in large systems the data paths carrying packet segments and the control signal paths may have substantially different delays. The invention provides for measurement of the propagation delay differences and for introducing a controlled delay in each slave module, so that data segments and control signals can be correctly correlated by delaying either the one or the other. Synchronization packets are transmitted besides normal data packets, for obtaining time stamps which are used to determine the delay difference.

公开(公告)号：DE60302045D1

公开(公告)日：2005-12-01

申请号：DE60302045

申请日：2003-02-27

Applicant: IBM

Inventor： ABEL FRANCOIS ,  BENNER ALAN ,  DITTMANN GERO ,  HERKERSDORF ANDREAS

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08 ,  H04L12/56 ,  H04L29/06 ,  G06F15/80

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：AU2003215841A1

公开(公告)日：2003-11-17

申请号：AU2003215841

申请日：2003-03-31

Applicant: IBM

Inventor： ABEL FRANCOIS G ,  BENNER ALAN ,  BLANC ALAIN ,  COLMANT MICHEL ,  GUSAT MITCH ,  PORET MICHEL ,  SCHUMACHER NORBERT ,  VERHAPPEN MARK

IPC: H04L12/56 ,  H04Q11/04

Abstract: A communication system which consists of several modules—operating in parallel on segments of a packet—to increase speed and handling capacity. One module acts as master, the others are slave modules controlled by control signals derived by the master module. It is important that in each module the data segment and the respective control signal of each packet are correctly synchronized, because in large systems the data paths carrying packet segments and the control signal paths may have substantially different delays. The invention provides for measurement of the propagation delay differences and for introducing a controlled delay in each slave module, so that data segments and control signals can be correctly correlated by delaying either the one or the other. Synchronization packets are transmitted besides normal data packets, for obtaining time stamps which are used to determine the delay difference.