公开(公告)号：MY120978A

公开(公告)日：2005-12-30

申请号：MYPI9800730

申请日：1998-02-20

Applicant: IBM

Inventor： BROWN JEFFERY S ,  GAUTHIER ROBERT J JR ,  TIAN XIAOWEI

IPC: H01L21/336 ,  H01L21/76 ,  H01L21/322 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/092

Abstract: THE PREFERRED EMBODIMENT OF THE PRESENT INVENTION OVERCOMES THE LIMITATIONS OF THE PRIOR ART AND PROVIDES A DEVICE AND METHOD TO INCREASE THE LATCH-UP IMMUNITY OF CMOS DEVICES BY REDUCING THE MOBILITY OF CARRIERS BETWEEN THE DEVICES. THE PREFERRED EMBODIMENT USES AN IMPANT (106) FORMED BENEATH TRENCH ISOLATION (102) BETWEEN N-CHANNEL AND P-CHANNEL DEVICES. THIS IMPLANT PREFERABLY COMPRISES RELATIVELY LARGE/HEAVY ELEMETS IMPLANTED INTO THE WAFER(100) BENEATH THE TRENCH ISOLATION. THE IMPLANT ELEMENTS REDUCE THE MOBILITY OF THE CHARGE CARRIERS. THIS INCREASES THE LATCH-UP HOLDING VOLTAGE AND THUS REDUCES THE LIKELIHOOD OF LATCH-UP. THE IMPLANTS CAN BE FORMED WITHOUT THE NEED FOR ADDITIONAL PHOTOLITHOGRAPHY MASKS.FIGURE 4

公开(公告)号：SG60207A1

公开(公告)日：1999-02-22

申请号：SG1998000433

申请日：1998-02-26

Applicant: IBM

Inventor： BROWN JEFFERY S ,  GAUTHIER ROBERT J JR ,  TIAN XIAOWEI

IPC: H01L21/76 ,  H01L21/322 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/092 ,  H01L21/336

Abstract: The preferred embodiment of the present invention overcomes the imitations of the prior art and provides a device and method to increase the latch-up immunity of CMOS devices by reducing the mobility of carriers between the devices. The preferred embodiment uses an implant formed beneath trench isolation between n-channel and p-channel devices. This implant preferably comprises relatively large/heavy elements implanted into the wafer beneath the trench isolation. The implant elements reduce the mobility of the charge carriers. This increases the latch-up holding voltage and thus reduces the likelihood of latch-up. The implants can be formed without the need for additional photolithography masks.