公开(公告)号：EP1581968A4

公开(公告)日：2007-04-18

申请号：EP02808339

申请日：2002-12-20

Applicant: IBM

Inventor： RANKIN JED H ,  ABADEER WAGDI W ,  BROWN JEFFREY S ,  CHATTY KIRAN V ,  TONTI WILLIAM R ,  GAUTHIER ROBERT J JR ,  FRIED DAVID M

IPC: H01L23/525 ,  H01L21/82 ,  H01L21/84 ,  H01L27/06 ,  H01L27/118 ,  H01L27/12

CPC classification number: H01L21/84 ,  H01L23/5252 ,  H01L27/0629 ,  H01L27/11807 ,  H01L27/1203 ,  H01L29/785 ,  H01L29/7854 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method is described for fabricating and antifuse structure (100) integrated with a semiconductor device such as a FINFET or planar CMOS devise. A region of semiconducting material (11) is provided overlying an insulator (3) disposed on a substrate (10); an etching process exposes a plurality of corners (111-114) in the semiconducting material. The exposed corners are oxidized to form elongated tips (111t-114t) at the corners; the oxide (31) overlying the tips is removed. An oxide layer (51), such as a gate oxide, is then formed on the semiconducting material and overlying the corners; this layer has a reduced thickness at the corners. A layer of conducting material (60) is formed in contact with the oxide layer (51) at the corners, thereby forming a plurality of possible breakdown paths between the semiconducting material and the layer of conducting material through the oxide layer. Applying a voltage, such as a burn-in voltage, to the structure converts at least one of the breakdown paths to a conducting path (103, 280).

公开(公告)号：JP2010153798A

公开(公告)日：2010-07-08

申请号：JP2009247485

申请日：2009-10-28

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： LI JUNJUN ,  SRIVASTAVA ANKIT ,  GAUTHIER ROBERT J JR

IPC: H01L21/822 ,  H01L21/331 ,  H01L27/04 ,  H01L27/06 ,  H01L29/73 ,  H01L29/74

CPC classification number: H01L29/66386 ,  H01L24/06 ,  H01L27/0262 ,  H01L29/74 ,  H01L29/7436 ,  H01L2224/05554 ,  H01L2924/14 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a design structure and a method for an electrostatic discharge (ESD) silicon controlled rectifier (SCR) Structure.
SOLUTION: This design structure is embodied in a machine-readable medium for designing, manufacturing, or testing a design. The design structure includes first and second silicon controlled rectifiers (SCRs) formed in a substrate. Furthermore, the first and the second SCRs each includes at least one component which is commonly shared between the first and the second SCRs.
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供静电放电（ESD）可控硅整流器（SCR）结构的设计结构和方法。

解决方案：该设计结构体现在用于设计，制造或测试设计的机器可读介质中。 该设计结构包括形成在衬底中的第一和第二可控硅整流器（SCR）。 此外，第一和第二SCR各自包括在第一和第二SCR之间共同共享的至少一个部件。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：WO2011002612A3

公开(公告)日：2011-03-10

申请号：PCT/US2010038934

申请日：2010-06-17

Applicant: IBM ,  ABOU-KHALIL MICHEL J ,  LEE TOM C ,  LI JUNJUN ,  GAUTHIER ROBERT J JR ,  PUTNAM CHRISTOPHER S ,  MITRA SOUVICK

Inventor： ABOU-KHALIL MICHEL J ,  LEE TOM C ,  LI JUNJUN ,  GAUTHIER ROBERT J JR ,  PUTNAM CHRISTOPHER S ,  MITRA SOUVICK

IPC: H01L21/82 ,  H01L27/02

CPC classification number: G11C17/16 ,  G11C11/5692 ,  H01L23/5252 ,  H01L23/5256 ,  H01L27/101 ,  H01L27/112 ,  H01L27/11206 ,  H01L45/085 ,  H01L45/1206 ,  H01L45/14 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Disclosed are embodiments of an e-fuse programming/re-programming circuit. In one embodiment, the e-fuse (150) has two short high atomic diffusion resistance conductor layers (110, 130) positioned on opposite sides (121, 122) and at a same end (123) of a long low atomic diffusion resistance conductor layer (120). A voltage source (170) is used to vary the polarity and, optionally, the magnitude of voltage applied to the terminals (first terminal = 170/161/110; second terminal = 170/162/130; third terminal = 170/163/proximate end 123 of conductor layer 120; and, fourth terminal = 170/164/distal end 124 of conductor layer 120) in order to control bi-directional flow of electrons within the long conductor layer and, thereby formation of opens and/or shorts at the long conductor layer-short conductor layer interfaces (125, 126). The formation of such opens and/or shorts can be used to achieve different programming states (11, 01, 10, 00). Other circuit structure embodiments incorporate e-fuses (650) with additional conductor layers and additional terminals so as to allow for even more programming states. Also disclosed are embodiments of associated e-fuse programming and re-programming methods.

Abstract translation: 公开了电子熔丝编程/重新编程电路的实施例。 在一个实施例中，电子熔丝（150）具有两个短的高原子扩散电阻导体层（110,130），其位于长的低原子扩散电阻导体（110,130）的相对侧（121,122）上和同一端（123） 层（120）。 使用电压源（170）来改变施加到端子（第一端= 170/161/110;第二端= 170/162/130;第三端= 170/163 / 以控制导体层120的近端123;以及导体层120的第四端子= 170/164 /远端124），以便控制长导体层内电子的双向流动，从而形成开路和/或短路 在长导体层 - 短导体层界面（125,126）处。 这种开路和/或短路的形成可以用来实现不同的编程状态（11,01,10,00）。 其他电路结构实施例将e熔丝（650）与额外的导体层和额外的端子结合，以允许更多的编程状态。 还公开了相关联的电子熔丝编程和重新编程方法的实施例。

公开(公告)号：JP2007158342A

公开(公告)日：2007-06-21

申请号：JP2006326844

申请日：2006-12-04

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ABADEER WAGDI W ,  HAUSER MICHAEL J ,  ADKISSON JAMES W ,  RANKIN JED H ,  GAUTHIER ROBERT J JR ,  CHATTY KIRAN V ,  JEFFREY SCOTT BROWN ,  TONTI WILLIAM R

IPC: H01L21/82 ,  H01L21/822 ,  H01L27/04 ,  H01L27/14 ,  H01L31/12

CPC classification number: H01L23/5256 ,  H01L23/525 ,  H01L27/14609 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a method of executing an electrical function such as a fusing operation by activation through a chip-embedded photodiode through spectrally selected external light activation, a corresponding structure, and a corresponding circuit. SOLUTION: In conjunction with additional circuit elements to an integrated circuit, incident light with specific intensity/wave length characteristics performs the implementation of repairs. More specifically, failing circuit elements are replaced with redundant ones for yield and/or reliability, and, after a packaged chip is placed in the system, the incident light makes an ESD protection device be disconnected from input pad. No additional pins on the package are necessary. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种通过光谱选择的外部光激活，对应的结构和相应的电路来通过芯片嵌入式光电二极管的激活来执行诸如定影操作之类的电功能的方法。

解决方案：结合集成电路的附加电路元件，具有特定强度/波长特性的入射光执行维修。 更具体地，用于产生和/或可靠性的冗余电路元件被替换，并且在将封装芯片放置在系统中之后，入射光使得ESD保护装置与输入焊盘断开连接。 不需要额外的引脚。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JPH10261766A

公开(公告)日：1998-09-29

申请号：JP3990998

申请日：1998-02-23

Applicant: IBM

Inventor： BROWN JEFFREY S ,  GAUTHIER ROBERT J JR ,  TIAN XIAOWEI

IPC: H01L21/76 ,  H01L21/322 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/092

Abstract: PROBLEM TO BE SOLVED: To improve a CMOS device in latch-up resistance by a method wherein an injected part formed under a shallow trench isolation between an N-channel device and a P-channel device is used. SOLUTION: An N-channel device is isolated from a P-channel device by the use of a shallow trench isolation STI 102. The shallow trench isolation STI 102 is formed by removing a part of a wafer which is not covered with a masking layer 104 through a reactive ion etching method. In a following process, an N-channel device and a P-channel device are formed on a wafer part 100. Then, element is injected to form an injected part 106 below the STI 102. It is preferable that the element of the injected part 106 is selected so as to make an N well or a P well minimum in counter doping. Therefore, it is preferable that the element contains large and heavy element.

公开(公告)号：JP2002270697A

公开(公告)日：2002-09-20

申请号：JP2002021072

申请日：2002-01-30

Applicant: IBM

Inventor： BROWN JEFFREY S ,  GAUTHIER ROBERT J JR ,  RANKIN JED H ,  TONTI WILLIAM R

IPC: H01L27/04 ,  H01L21/763 ,  H01L21/768 ,  H01L21/822 ,  H01L27/00 ,  H01L27/02 ,  H01L27/12

Abstract: PROBLEM TO BE SOLVED: To provide efficient heat radiation which is related to an SOI structure, by forming a semiconductor device located beneath an embedded insulation layer, which is in turn electrically connected to an electrical structure body formed on the SOI structure. SOLUTION: The SOI structure is formed on a bulk semiconductor substrate. A trench, whose one end interfaces with the bulk semiconductor substrate is formed penetrating through the SOI layer. A semiconductor device, comprising a P diffusion region and N diffusion region, is formed on the bulk semiconductor substrate. A conductive plug, which self-matching with the P diffusion region and N diffusion region, while electrically contacting them, is formed in the trench. The semiconductor device formed in the bulk semiconductor substrate can contain an electrostatic discharge(ESD) device. The bulk semiconductor substrate functions as a medium for efficiently radiating heat generated by the (ESD) device, since its thermal conductivity is high.

公开(公告)号：JP2001298188A

公开(公告)日：2001-10-26

申请号：JP2001083621

申请日：2001-03-22

Applicant: IBM

Inventor： JEFFREY SCOTT BROWN ,  FURKAY STEPHEN SCOTT ,  GAUTHIER ROBERT J JR ,  MARTIN DALE WARNER ,  SLINKMAN JAMES ALBERT

IPC: H01L29/78 ,  H01L21/265 ,  H01L21/335 ,  H01L21/336 ,  H01L29/10

Abstract: PROBLEM TO BE SOLVED: To provide an FET where an inverse short channel effect is reduced as well as a method for forming it. SOLUTION: Germanium is so implanted over the entire semiconductor substrate at an appropriate intensity and quantity that a peak ion concentration is generated under the source and drain of the FET. The germanium is implanted before the gate, source, and drain are formed, so an inversion short channel effect which is shown with normal FETs is reduced. The short channel effect occurring with the normal FETs is never affected by implantation of germanium.

公开(公告)号：DE112012000264T5

公开(公告)日：2013-10-02

申请号：DE112012000264

申请日：2012-01-20

Applicant: IBM

Inventor： PUTNAM CHRISTOPHER S ,  LI JUNJUN ,  ABOU-KHALIL MICHAEL J ,  GAUTHIER ROBERT J JR ,  LEE TOM C ,  SOUVICK MITRA

IPC: H01L21/84 ,  H01L21/8249 ,  H01L23/60 ,  H01L27/12

Abstract: Einheitenstrukturen mit einer verringerten Übergangsfläche in einem SOI-Prozess, Verfahren zum Fertigen der Einheitenstrukturen und Konstruktionsstrukturen für eine Lateraldiode (56). Die Einheitenstruktur beinhaltet einen oder mehrere dielektrische Bereiche (20a, 20b, 20c) wie zum Beispiel STI-Bereiche, die in dem Einheitenbereich (18) positioniert sind und sich mit dem p-n-Übergang (52, 54) zwischen einer Anode (40, 42) und einer Kathode (28, 30, 48a, 48b, 49a, 49b, 50a, 50b) überschneiden. Die dielektrischen Bereiche, die mithilfe von Techniken für flache Grabenisolationen ausgebildet werden können, dienen dazu, die Breite eines p-n-Übergangs im Hinblick auf die Breitenfläche der Kathode an einer Position zu verringern, die seitlich von dem p-n-Übergang und der Anode beabstandet ist. Der Breitenunterschied und das Vorhandensein der dielektrischen Bereiche erzeugt eine asymmetrische Diodenstruktur. Das Volumen des Einheitenbereichs, das durch die dielektrischen Bereiche eingenommen wird, wird so weit wie möglich verringert, um das Volumen der Kathode und der Anode zu erhalten.

公开(公告)号：GB2505853B

公开(公告)日：2015-11-25

申请号：GB201400368

申请日：2012-06-01

Applicant: IBM

Inventor： CAMILLO-CASTILLO RENATA ,  DAHLSTROM ERIK M ,  GAUTHIER ROBERT J JR ,  GEBRESELASIE EPHREM G ,  PHELPS RICHARD A ,  SHI YUN ,  STRICKER ANDREAS D

IPC: H01L29/66 ,  H01L27/02

公开(公告)号：DE112010002791T5

公开(公告)日：2012-08-23

申请号：DE112010002791

申请日：2010-06-17

Applicant: IBM

Inventor： ABOU-KHALI MICHEL J ,  LEE TOM ,  LI JUNJUN ,  GAUTHIER ROBERT J JR ,  CHRISTOPHER S PUTNAM ,  MITRA SOUVIK

IPC: H01L23/525 ,  H01L21/768 ,  H01L27/02 ,  H01L27/112

Abstract: Es werden Ausführungsarten eines Schaltkreises zum Programmieren/Umprogrammieren einer elektronischen Sicherung beschrieben. Bei einer Ausführungsart weist die elektronische Sicherung (150) zwei kurze Leiterschichten (110, 130) mit hohem Atomdiffusionswiderstand auf, die an entgegengesetzten Seiten (121, 122) und am selben Ende (123) einer langen Leiterschicht mit niedrigem Atomdiffusionswiderstand (120) angeordnet sind. Eine Spannungsquelle (170) wird verwendet, um die Polarität und wahlweise die Höhe der an die Anschlussklemmen (erste Anschlussklemme = 170/161/110; zweite Anschlussklemme = 170/162/130; dritte Anschlussklemme = 170/163/zugewandtes Ende 123 der Leiterschicht 120; und vierte Anschlussklemme = 170/164/abgewandtes Ende 124 der Leiterschicht 120) zu ändern, um den bidirektionalen Elektronenfluss innerhalb der langen Leiterschicht und dadurch die Bildung von Leitungsunterbrechungen und/oder Kurzschlüssen an den Grenzflächen (125, 126) zwischen den langen Leiterschichten und den kurzen Leiterschichten zu steuern. Die Bildung solcher Leitungsunterbrechungen und/oder Kurzschlüsse kann zum Erzeugen verschiedener Programmierzustände (11, 01, 10, 00) verwendet werden. Andere Ausführungsarten der Schaltkreisstruktur beinhalten elektronische Sicherungen (650) mit zusätzlichen Leiterschichten und zusätzlichen Anschlussklemmen, um eine größere Anzahl von Programmierzuständen zu ermöglichen. Ferner werden auch zugehörige Verfahren zum Programmieren und Umprogrammieren einer elektronischen Sicherung beschrieben.