HIERARCHICAL MEMORY SYSTEM INCLUDING SEPARATE CACHE MEMORIES FOR STORING DATA AND INSTRUCTIONS

    公开(公告)号:CA1199420A

    公开(公告)日:1986-01-14

    申请号:CA443643

    申请日:1983-12-19

    Applicant: IBM

    Abstract: A HIERARCHICAL MEMORY SYSTEM INCLUDING SEPARATE CACHE MEMORIES FOR STORING DATA AND INSTRUCTIONS A hierarchical memory system for use with a high speed data processor characterized by having separate dedicated cache memories for storing data and instructions and further characterized by each cache having a unique cache directory containing a plurality of control bits for assisting line replacement within the individual cache memories and for eliminating many accesses to main memory and to insure that unnecessary or incorrect data is never stored back into said main memory.

    3.
    发明专利
    未知

    公开(公告)号:FR2413846A1

    公开(公告)日:1979-07-27

    申请号:FR7834441

    申请日:1978-11-30

    Applicant: IBM

    Abstract: A Minimum Delay Module Assembly, having unrestricted accessibility for servicing, that provides substantially constant electrical and thermal environments for all portions of the assembly regardless of configuration. The assembly comprises a plurality of vertical page modules in which each page module is vertically hinged to the adjacent page module. Electrical interconnections are provided between the page modules by means of cable assemblies which enter each page module in the edge thereof adjacent said hinges. Individual self contained cooling means are provided for each page module so that the flow of air is up through the bottom of each page module and out through the top thereof. Resilient conduit means may be utilized to supply a pressurized coolant to each page module regardless of the configuration of the module assembly. The complete vertically hinged module assembly is supported on a base assembly, including a foraminous base member sufficiently large to support said hinged module assembly when in the closed position and further including at least one foraminous foldable shelf which folds out of the way when the assembly is in the closed position and folds to a position coplanar with said base member when in the "open for service" position. The base assembly further includes a chamber or space under the base member which provides for an unrestricted flow of air up through said base member.

    GAIN METHOD AND APPARATUS FOR A DELTA MODULATOR

    公开(公告)号:CA1077624A

    公开(公告)日:1980-05-13

    申请号:CA243982

    申请日:1976-01-21

    Applicant: IBM

    Abstract: GAIN METHOD AND APPARATUS FOR A DELTA MODULATOR In a delta modulator a sequence of code symbols are generated which are indicative of increments of signal level, with each code symbol being determined in accordance with the difference in signal level between an input signal and a prediction signal which is a representation of the input signal. A sequence of the generated code symbols are stored, including the most recent code symbol and a preceding number of code symbols, with the pattern or code symbols at any instant defining a state of signal activity. There is a table of delta increments, a table of threshold values, and a digital gain logic network, all of which provide signal outputs which are controlled by the state of signal activity represented by the stored code signal pattern. The signal output from the delta table and the threshold table are modified an amount determined by the value of the signal output from the digital gain logic network. An accumulation of modified delta increments are summed with modified threshold values for providing the prediction signal. The prediction signal and the input signal are compared for generating a new code symbol.

    5.
    发明专利
    未知

    公开(公告)号:FR2397699A1

    公开(公告)日:1979-02-09

    申请号:FR7819403

    申请日:1978-06-20

    Applicant: IBM

    Abstract: A method of and apparatus for time compression and changing the readout speed of a delta modulation encoded audio signal. The encoded audio signal has portions selectively deleted therefrom in accordance with detected zero crossovers of the same sign which occur in a predetermined timing sequence. The encoded audio signal which has had portions selectively deleted therefrom is decoded, with the undeleted decoded portions being joined. The undeleted portions have the same gain factor where joined, thereby eliminating step transients.

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