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公开(公告)号:DE60314868T2
公开(公告)日:2008-03-13
申请号:DE60314868
申请日:2003-04-18
Applicant: IBM
Inventor: CASTRIOTTA MICHELE , OGGIONI STEFANO , ROGIANI GIANLUCA , SPREAFICO MAURO , VIERO GIORGIO
IPC: H05K1/11 , H01L23/498 , H05K3/46 , H01L23/538 , H01L23/66 , H05K1/02
Abstract: A stacked via structure ( 200 ) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks ( 205 a, 205 b, 205 c) belonging to three adjacent conductive layers ( 110 a, 110 b, 110 c) separated by dielectric layers ( 120 ), aligned according to z axis. Connections between these conductive tracks are done with at least two vias ( 210, 215 ) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis.
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公开(公告)号:DE60314868D1
公开(公告)日:2007-08-23
申请号:DE60314868
申请日:2003-04-18
Applicant: IBM
Inventor: CASTRIOTTA MICHELE , OGGIONI STEFANO , ROGIANI GIANLUCA , SPREAFICO MAURO , VIERO GIORGIO
IPC: H05K1/11 , H01L23/498 , H05K3/46 , H01L23/538 , H01L23/66 , H05K1/02
Abstract: A stacked via structure ( 200 ) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks ( 205 a, 205 b, 205 c) belonging to three adjacent conductive layers ( 110 a, 110 b, 110 c) separated by dielectric layers ( 120 ), aligned according to z axis. Connections between these conductive tracks are done with at least two vias ( 210, 215 ) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis.
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公开(公告)号:AT367077T
公开(公告)日:2007-08-15
申请号:AT03787806
申请日:2003-04-18
Applicant: IBM
Inventor: CASTRIOTTA MICHELE , OGGIONI STEFANO , ROGIANI GIANLUCA , SPREAFICO MAURO , VIERO GIORGIO
IPC: H05K1/11 , H05K3/46 , H01L23/498 , H01L23/538 , H01L23/66 , H05K1/02
Abstract: A stacked via structure ( 200 ) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks ( 205 a, 205 b, 205 c) belonging to three adjacent conductive layers ( 110 a, 110 b, 110 c) separated by dielectric layers ( 120 ), aligned according to z axis. Connections between these conductive tracks are done with at least two vias ( 210, 215 ) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis.
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公开(公告)号:AU2003276277A1
公开(公告)日:2004-03-03
申请号:AU2003276277
申请日:2003-04-18
Applicant: IBM
Inventor: CASTRIOTTA MICHELE , OGGIONI STEFANO , ROGIANI GIANLUCA , SPREAFICO MAURO , VIERO GIORGIO
IPC: H05K3/46 , H01L23/498 , H01L23/538 , H01L23/66 , H05K1/02 , H05K1/11
Abstract: A stacked via structure ( 200 ) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks ( 205 a, 205 b, 205 c) belonging to three adjacent conductive layers ( 110 a, 110 b, 110 c) separated by dielectric layers ( 120 ), aligned according to z axis. Connections between these conductive tracks are done with at least two vias ( 210, 215 ) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis.
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