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    Electro-optical module comprising flexible connection cable and manufacturing method therefor
    3.
    发明专利
    Electro-optical module comprising flexible connection cable and manufacturing method therefor 有权
    包含柔性连接电缆的电光模块及其制造方法

    公开(公告)号：JP2005197689A

    公开(公告)日：2005-07-21

    申请号：JP2004372553

    申请日：2004-12-24

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： OFFREIN BERT ,  OGGIONI STEFANO

    IPC: H01L31/12 ,  G02B6/42 ,  H04B10/02 ,  H05K1/02 ,  H05K3/00

    CPC classification number: G02B6/43 ,  H05K1/0274 ,  H05K1/141 ,  H05K1/147 ,  H05K3/0061 ,  H05K3/0067 ,  H05K2201/048 ,  H05K2201/09127 ,  H05K2201/2009

    Abstract: PROBLEM TO BE SOLVED: To provide an electro-optical module which allows precise alignment of optical elements in a printed circuit board.
    SOLUTION: An electro-optical module comprising a flexible connection cable and aligning capabilities is disclosed. According to the invention, electro-optical devices are soldered on a transparent substrate made of glass or the like or a substrate comprising an optical waveguide, and conductive traces are designed, forming an electro-optical module. The electro-optical module is inserted and aligned into a printed circuit board, and the external part of the substrate comprising conductive traces and pads, which is referred to as a flexible cable, is bent toward the mounting surface of the PCB, allowing establishment of electrical connection between these pads and the PCB. The substrate is broken along a preformed groove, and the external part of the substrate is removed, leaving the flexible cable section in place.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：提供允许印刷电路板中的光学元件精确对准的电光模块。 公开了一种包括柔性连接电缆和对准能力的电光模块。 根据本发明，将电光装置焊接在由玻璃等制成的透明基板上或者包括光波导的基板上，并且设计导电迹线，形成电光模块。 将电光模块插入并对准印刷电路板，并且包括导电迹线和衬垫的被称为柔性电缆的衬底的外部部分朝向PCB的安装表面弯曲，从而允许建立 这些焊盘和PCB之间的电气连接。 衬底沿着预成型的凹槽断裂，并且去除衬底的外部部分，使柔性电缆部分保持在适当的位置。 版权所有（C）2005，JPO＆NCIPI

    Multilayer module
    4.
    发明专利
    Multilayer module 有权
    多层模块

    公开(公告)号：JP2005223332A

    公开(公告)日：2005-08-18

    申请号：JP2005026945

    申请日：2005-02-02

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： FRECH ROLAND DR ,  GARBEN BERND DR ,  KLINK ERICH ,  OGGIONI STEFANO

    IPC: H01L23/12 ,  H01L23/498 ,  H05K1/00 ,  H05K1/02

    CPC classification number: H05K1/0216 ,  H01L23/49822 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/0298 ,  H05K2201/09327 ,  H05K2201/10522 ,  H05K2201/10734

    Abstract: PROBLEM TO BE SOLVED: To increase the importance of a future microprocessor and a future computer system by decreasing power noise of intermediate frequency, by providing a semiconductor device structure for improving power noise property, and to provide a multilayer module having superior electrical characteristics accompanying reduction in the manufacturing cost, increase in wiring capability, and decrease in inductance. SOLUTION: A multilayer module comprises a top conductive layer L1 to which an electronic component is attached, a plurality of insulating layers 6, and a plurality of conductive layers L2-L8 arranged between the insulating layers. As for the conductive layers L1-L4 near the front surface of the module, two of at least three layers, a potential layer and/or a ground layer, are arranged alternately such that a signal layer is not sandwiched by the layers. Further, the multilayer module has a via, by which a corresponding signal layer, the potential layer, and the ground layer are electrically connected with each another and also with the top conductive layer L1. Further, the multilayer module has two layers of the potential layer and the ground layer, arranged alternately near the front surface, so that there is no signal layer therebetween, and a structure in which the via is not arranged in a local region for attaining the electrical effects of a solid surface. COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：通过提供用于提高功率噪声性能的半导体器件结构，通过降低中频功率噪声来增加未来微处理器和未来计算机系统的重要性，并提供具有优异电气的多层模块 随着制造成本的降低，接线能力的增加和电感的降低。 解决方案：多层模块包括安装电子部件的顶部导电层L1，多个绝缘层6和布置在绝缘层之间的多个导电层L2-L8。 对于在模块前表面附近的导电层L1-L4，交替地布置至少三层中的至少三层，即电位层和/或接地层，使得信号层不被层夹在中间。 此外，多层模块具有通孔，相应的信号层，电位层和接地层彼此电连接，并且还与顶部导电层L1电连接。 此外，多层模块具有两层电位层和接地层，交替地布置在前表面附近，使得它们之间不存在信号层，并且其中通孔不被布置在局部区域中以获得 固体表面的电气效应。 版权所有（C）2005，JPO＆NCIPI

    7.
    发明专利
    未知

    公开(公告)号：DE60314868D1

    公开(公告)日：2007-08-23

    申请号：DE60314868

    申请日：2003-04-18

    Applicant: IBM

    Inventor： CASTRIOTTA MICHELE ,  OGGIONI STEFANO ,  ROGIANI GIANLUCA ,  SPREAFICO MAURO ,  VIERO GIORGIO

    IPC: H05K1/11 ,  H01L23/498 ,  H05K3/46 ,  H01L23/538 ,  H01L23/66 ,  H05K1/02

    Abstract: A stacked via structure ( 200 ) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks ( 205 a, 205 b, 205 c) belonging to three adjacent conductive layers ( 110 a, 110 b, 110 c) separated by dielectric layers ( 120 ), aligned according to z axis. Connections between these conductive tracks are done with at least two vias ( 210, 215 ) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis.

    8.
    发明专利
    未知

    公开(公告)号：AT367077T

    公开(公告)日：2007-08-15

    申请号：AT03787806

    申请日：2003-04-18

    Applicant: IBM

    Inventor： CASTRIOTTA MICHELE ,  OGGIONI STEFANO ,  ROGIANI GIANLUCA ,  SPREAFICO MAURO ,  VIERO GIORGIO

    IPC: H05K1/11 ,  H05K3/46 ,  H01L23/498 ,  H01L23/538 ,  H01L23/66 ,  H05K1/02

    Abstract: A stacked via structure ( 200 ) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks ( 205 a, 205 b, 205 c) belonging to three adjacent conductive layers ( 110 a, 110 b, 110 c) separated by dielectric layers ( 120 ), aligned according to z axis. Connections between these conductive tracks are done with at least two vias ( 210, 215 ) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis.

    A circuitised substrate for high-frequency applications
    9.
    发明专利
    A circuitised substrate for high-frequency applications 未知

    公开(公告)号：GB2374984B

    公开(公告)日：2004-10-06

    申请号：GB0110072

    申请日：2001-04-25

    Applicant: IBM

    Inventor： OGGIONI STEFANO ,  RAVANELLI ROBERTO

    IPC: H01L23/498 ,  H01L23/66 ,  H05K1/02 ,  H05K1/11 ,  H05K3/42

    Abstract: A multi-layered circuitized substrate for high-frequency applications. Conductive via-holes extend between two non-adjacent conductive layers for transmitting high-frequency signals therebetween. For each via-hole, shielding rings connectable to a reference voltage are provided, each ring formed in a corresponding intermediate conductive layer between the two non-adjacent conductive layers. The rings define a shielding coaxial structure for the via-hole. Preferably, the intermediate conductive layers are spaced apart from the via-hole, and particularly from respective lands at the ends thereof, in order to reduce stray capacitance associated with the via-hole without losing the shielding effect provided by the rings.

    10.
    发明专利
    未知

    公开(公告)号：AT490554T

    公开(公告)日：2010-12-15

    申请号：AT02795072

    申请日：2002-10-25

    Applicant: IBM

    Inventor： ALCOE DAVE ,  NOWAK RONALD ,  PREDA FRANCESCO ,  OGGIONI STEFANO

    IPC: H01L23/12 ,  H01L23/498 ,  H01L23/16 ,  H01L23/36 ,  H01L23/66 ,  H01L25/065 ,  H05K1/02 ,  H05K1/11

    Abstract: An electronic device carrier ( 110 ) adapted for transmitting high-frequency signals, including a circuitized substrate with a plurality of conductive layers ( 240 a to 240 g) insulated from each other, the conductive layers being arranged in a sequence from a first one of the conductive layers ( 240 a) wherein a plurality of signal tracks ( 200 ) each one ending with a contact area ( 205 ) for transmitting a high-frequency signal are formed, and a reference structure ( 215 a , 215 b , 230 ) connectable to a reference voltage or ground for shielding the signal tracks the reference structure includes at least one reference track ( 230 ) formed in a second one of the conductive layers ( 240 b) adjacent to the first conductive layer and at least one further reference track formed in one of the conductive layers ( 240 d) different from the first and second conductive layer, a portion of each signal track excluding at least the area corresponding to the orthographic projection of associated contact area being superimposed in plan view to a corresponding reference track and at least a part of the area corresponding to the orthographic projection of the contact area associated to each signal track being superimposed in plan view to a corresponding further reference track with interposition of a floating conductive track, i.e. a track not connected to any signal, reference voltage or ground track.

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