中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

9 records (took 0.016 seconds)

    Multiple random error correcting system
    3.
    发明授权
    Multiple random error correcting system 失效
    多个随机错误校正系统

    公开(公告)号：US3582878A

    公开(公告)日：1971-06-01

    申请号：US3582878D

    申请日：1969-01-08

    Applicant: IBM ,  ROBERT T CHIEN

    Inventor： BOSSEN DOUGLAS C ,  CHIEN ROBERT T ,  HSIAO MU-YUE ,  SELLERS FREDERICK F JR

    IPC: H03M13/19 ,  H04L1/00 ,  H04L1/10 ,  G08C25/00

    CPC classification number: H04L1/0057 ,  H03M13/19 ,  H04L1/0041

    Abstract: The error correcting system is capable of correcting multiple random errors in data messages of k m2 data bits where m is an integer. The message is encoded by adding 2m check bits for each additional error correcting capability. The encoded message after data transfer and storage is decoded by parity checking and threshold logic decision circuits. The parity checking circuits are constructed in modular form. Each additional module adds a further error correcting capability. The outputs from each module form inputs to the threshold logic decision circuit where the error correction is made. Detection of an additional error can be simply achieved by an overall parity circuit.

    CHECKING POLYNOMIAL FOR DETECTING ALL ODD LINE ERRORS WITH SCRAMBLERS
    8.
    发明专利
    CHECKING POLYNOMIAL FOR DETECTING ALL ODD LINE ERRORS WITH SCRAMBLERS 未知

    公开(公告)号：CA984513A

    公开(公告)日：1976-02-24

    申请号：CA170036

    申请日：1973-04-24

    Applicant: IBM

    Inventor： BOUDREAU PAUL E ,  CHIEN ROBERT T ,  PECK CHARLES C

    IPC: H03M13/00 ,  H03M13/09 ,  H03M13/17

    Abstract: If digital data sequences of length n bits are successively encoded for protection against error by appending to each block of n bits in a sequence of r check bits, the r check bits being calculated from the n bits of the block by iteratively dividing the data stream, by a generator polynomial g(x) prior to each transmission and then by iteratively dividing the data sequence and remainder by a scrambler polynomial S(x), then the apparent error E(x) at the receiver due to channel error e(x), after descrambling (multiplying) by polynomial S(x), is represented by the relation E(x) = S(x) e(x). When scrambling polynomial S(x) is of the form S(x) = 1 + x, then each channel error is replaced by two adjacent errors, hence E(x) = (1 = x) e(x). All single and odd errors are nevertheless detectable in such circumstances by modifying g(x) such that g(x) = (1 + x)m 1 t(x). Furthermore, burst type channel error of length >/= b is detectable, in addition to all single and odd errors, if the scrambler polynomial S(x) assumes the form S(x) = (1 + x)m f(x) and the generator polynomial is modified so that g(x) = (1 + x)m 1 t(x) where f(x) and t(x) are polynomials having an odd number of terms and relatively prime and t(x) is of degree >/= b.

Patent Agency Ranking