公开(公告)号：DE3271123D1

公开(公告)日：1986-06-19

申请号：DE3271123

申请日：1982-06-08

Applicant: IBM DEUTSCHLAND ,  IBM

Inventor： CHILINSKI HERBERT DIPL ING ,  GETZLAFF KLAUS J ING GRAD ,  HAJDU JOHANN ING GRAD ,  RAETH FRANZ JOSEF

IPC: G06F9/22 ,  G06F9/26 ,  G06F9/30 ,  G06F9/318

公开(公告)号：DE2756764A1

公开(公告)日：1979-06-21

申请号：DE2756764

申请日：1977-12-20

Applicant: IBM DEUTSCHLAND

Inventor： BLUM ARNOLD DIPL ING ,  BAZLEN DIETER DR ING ,  BERGER ROLF DIPL ING ,  BOCK DIETRICH DIPL ING ,  CHILINSKI HERBERT DIPL ING ,  GENG HELLMUTH ROLAND ,  GETZLAFF KLAUS ING GRAD ,  HAJDU JOHANN ,  RICHTER STEPHAN

IPC: G06F9/22 ,  G06F13/42 ,  G06F9/00 ,  G06F13/06

Abstract: The synchronising arrangement is for a processor and memory in an electronic data processing installation. There is a delay from the memory when data is demanded from it by the processor. A section of the arrangement has an output to the operations register of the processor for the provision of a code combination corresponding to a certain micro-instruction lasting for the duration of the memory delay. The operations decoder provides a corresponding output signal which stops the demand cycle counter. The operations register loads the next operation code existing at its input when it receives the next pulse of the system.

公开(公告)号：DE2758146A1

公开(公告)日：1979-06-28

申请号：DE2758146

申请日：1977-12-27

Applicant: IBM DEUTSCHLAND

Inventor： BLUM ARNOLD DIPL ING ,  CHILINSKI HERBERT DIPL ING ,  GENG HELLMUTH ROLAND ,  GETZLAFF KLAUS ING GRAD ,  HAJDU JOHANN ,  NEUBER SIEGFRIED ,  RICHTER STEPHAN ,  RUST BERND ,  WILLE UDO ING GRAD

IPC: G06F9/38 ,  G06F9/00 ,  G06F13/06 ,  G11C7/00

Abstract: A control switching network is used in the programming circuit of a digital calculator. The processing unit is connected to a process timing and control unit. This unit is connected to a data store via a set of the intermediate connections. A system is used to keep the store in synchronism with the processing unit. An identification network is used, which produces a signal controlling the action of the store. Store activity monitoring signals are used, and instructions are given to the store in a series of given cycles.

公开(公告)号：DE4334294C1

公开(公告)日：1995-04-20

申请号：DE4334294

申请日：1993-10-08

Applicant: IBM

Inventor： HALLER WILHELM ERNST ,  GETZLAFF KLAUS JOERG DIPL ING ,  CHILINSKI HERBERT DIPL ING ,  KOESTER RALPH

IPC: G06F9/305 ,  G06F7/02 ,  G06F9/34 ,  G05B1/03 ,  H03K5/22

公开(公告)号：DE2747304A1

公开(公告)日：1979-04-26

申请号：DE2747304

申请日：1977-10-21

Applicant: IBM DEUTSCHLAND

Inventor： BAZLEN DIETER DIPL ING DR ,  BERGER ROLF DIPL ING ,  BLUM ARNOLD DIPL ING ,  BOCK DIETRICH DIPL ING ,  CHILINSKI HERBERT DIPL ING ,  GENG HELLMUTH ROLAND ,  HAJDU JOHANN ,  IRRO FRITZ DIPL ING ,  NEUBER SIEGFRIED ,  WILLE UDO

IPC: G06F9/22 ,  G06F9/16 ,  G06F13/06

Abstract: In a micro-controlled data handling system the number of lines and pins required to transfer control signals from the microprogram controls to be integrated circuit modules controlled by such signals is conserved by using two bussing paths for distributing the control signals to the modules. A first path is dedicated exclusively to pre-decoded control signal functions and a second path is shared for transferring both data and control signal functions. Each controlled module contains an additional decoding circuit for combinationally decoding control signal functions received through both paths.