公开(公告)号：ES2075837T3

公开(公告)日：1995-10-16

申请号：ES89110424

申请日：1989-06-09

Applicant: IBM

Inventor： CHISHOLM MATTHEW F ,  KIRCHNER PETER D ,  WARREN ALAN C ,  WOODALL JERRY M

IPC: C30B25/02 ,  C30B29/40 ,  C30B29/68 ,  H01L21/20 ,  H01L21/203 ,  H01L29/201

Abstract: Heterostructures (20) having a large lattice mismatch between an upper epilayer (24) and a substrate (22) and a method of forming such structures having a thin intermediate layer (26) are disclosed. The strain due to a lattice mismatch between the intermediate layer (26) and the substrate (22) is partially relieved by the formation of edge type dislocations (15) which are localized and photoelectrically inactive. Growth of the intermediate layer (26) is interrupted before it reaches the thickness at which the left over strain is relieved by 60 degree type threading dislocations. The upper epilayer (24) is then grown in an unstrained and defect-free condition upon the intermediate layer (26) where the unstrained lattice constant (aL2) of the epilayer (24) is about the same as the partially relieved strain lattice constant (aL1) of the intermediate layer (26). An unstrained defect-free epilayer (24) of InGaAs has been grown on a GaAs substrate (22) with an intermediate layer (26) 3-10 nm in thickness of InAs. Other large mismatch systems are disclosed, including, GaAs on Si with an intermediate layer (26) of GaInAs.

公开(公告)号：DE68923920D1

公开(公告)日：1995-09-28

申请号：DE68923920

申请日：1989-06-09

Applicant: IBM

Inventor： CHISHOLM MATTHEW F ,  KIRCHNER PETER D ,  WARREN ALAN C ,  WOODALL JERRY M

IPC: C30B25/02 ,  C30B29/40 ,  C30B29/68 ,  H01L21/20 ,  H01L21/203 ,  H01L29/201

Abstract: Heterostructures (20) having a large lattice mismatch between an upper epilayer (24) and a substrate (22) and a method of forming such structures having a thin intermediate layer (26) are disclosed. The strain due to a lattice mismatch between the intermediate layer (26) and the substrate (22) is partially relieved by the formation of edge type dislocations (15) which are localized and photoelectrically inactive. Growth of the intermediate layer (26) is interrupted before it reaches the thickness at which the left over strain is relieved by 60 degree type threading dislocations. The upper epilayer (24) is then grown in an unstrained and defect-free condition upon the intermediate layer (26) where the unstrained lattice constant (aL2) of the epilayer (24) is about the same as the partially relieved strain lattice constant (aL1) of the intermediate layer (26). An unstrained defect-free epilayer (24) of InGaAs has been grown on a GaAs substrate (22) with an intermediate layer (26) 3-10 nm in thickness of InAs. Other large mismatch systems are disclosed, including, GaAs on Si with an intermediate layer (26) of GaInAs.

公开(公告)号：DE68923920T2

公开(公告)日：1996-04-18

申请号：DE68923920

申请日：1989-06-09

Applicant: IBM

Inventor： CHISHOLM MATTHEW F ,  KIRCHNER PETER D ,  WARREN ALAN C ,  WOODALL JERRY M

IPC: C30B25/02 ,  C30B29/40 ,  C30B29/68 ,  H01L21/20 ,  H01L21/203 ,  H01L29/201

Abstract: Heterostructures (20) having a large lattice mismatch between an upper epilayer (24) and a substrate (22) and a method of forming such structures having a thin intermediate layer (26) are disclosed. The strain due to a lattice mismatch between the intermediate layer (26) and the substrate (22) is partially relieved by the formation of edge type dislocations (15) which are localized and photoelectrically inactive. Growth of the intermediate layer (26) is interrupted before it reaches the thickness at which the left over strain is relieved by 60 degree type threading dislocations. The upper epilayer (24) is then grown in an unstrained and defect-free condition upon the intermediate layer (26) where the unstrained lattice constant (aL2) of the epilayer (24) is about the same as the partially relieved strain lattice constant (aL1) of the intermediate layer (26). An unstrained defect-free epilayer (24) of InGaAs has been grown on a GaAs substrate (22) with an intermediate layer (26) 3-10 nm in thickness of InAs. Other large mismatch systems are disclosed, including, GaAs on Si with an intermediate layer (26) of GaInAs.

公开(公告)号：CA1330194C

公开(公告)日：1994-06-14

申请号：CA600745

申请日：1989-05-25

Applicant: IBM

Inventor： CHISHOLM MATTHEW F ,  KIRCHNER PETER D ,  WARREN ALAN C ,  WOODALL JERRY M

IPC: C30B25/02 ,  C30B29/40 ,  C30B29/68 ,  H01L21/20 ,  H01L21/203 ,  H01L29/201 ,  C30B29/10

Abstract: Heterostructures having a large lattice mismatch between an upper epilayer and a substrate and a method of forming such structures having a thin intermediate layer are disclosed. The strain due to a lattice mismatch between the intermediate layer and the substrate is partially relieved by the formation of edge type dislocations which are localized and photoelectrically inactive. Growth of the intermediate layer is interrupted before it reaches the thickness at which the left over strain is relieved by 60 degree type threading dislocations. The upper epilayer is then grown in an unstrained and defect-free condition upon the intermediate layer where the unstrained lattice constant of the epilayer is about the same as the partially relieved strain lattice constant of the intermediate layer. An unstrained defect-free epilayer of InGaAs has been grown on a GaAs substrate with an intermediate layer 3-10 nm in thickness of InAs. Other large mismatch systems are disclosed, including, GaAs on Si with an intermediate layer of GaInAs.