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公开(公告)号：DE69022122T2
公开(公告)日：1996-05-02
申请号：DE69022122
申请日：1990-06-06
Applicant: IBM
Inventor： CHUNG PAUL WINGSHING , GEE RALPH LEONARD , LANG LUKE CHUNG KUANG , SABER PAIK
Abstract: A means for setting the free-running frequency of a voltage controlled oscillator (VCO) (12) without requiring laser trimming or the like is described. The VCO forms part of an interconnected phase-locked loop (PLL) and frequency-locked loop (FLL). At system power on, the PLL is automatically disabled and a digital-to-analog (DAC) (11) in the PLL is set to a value corresponding substantially to the centre of a preselected lock range. The FLL, which includes a second DAC (10), then operates to generate a bias voltage for incrementing or decrementing the VCO output frequency until the VCO pulse count stored in a register equals an expected count; whereupon the VCO will be set at its free-running frequency. When the PLL is enabled, a phase error generator (14) generates a digital phase error signal from the input data. A digital integrator (19) converts the phase error signal to a digital frequency error signal. These error signals are added and the result is supplied to the DAC in the PLL for providing an analog output indicative of PLL frequency error. The outputs from both DACs are summed and the resultant current is converted to a bias voltage to adjust the VCO frequency as necessary for normally maintaining it within said lock range. If the VCO frequency deviates from said range, the frequency error signal to the PLL DAC is zeroed, and the frequency error signal is supplied to the FLL DAC. The phase error signal from the PLL DAC and the signal from the FLL DAC as modified by the frequency error signal are summed, and the resultant current in converted to a bias voltage to adjust the VCO frequency to within said lock range.
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Patent Agency Ranking
公开(公告)号：DE3888100D1
公开(公告)日：1994-04-07
申请号：DE3888100
申请日：1988-11-08
Applicant: IBM
Inventor： CHUNG PAUL WINGSHING , SABER PAIK NMN
Abstract: A voltage controlled oscillator (VCO) having high temperature stability and wide voltage/frequency linearity comprises a multivibrator switched by bipolar transistor switching means (Q9, Q10). Temperature fluctuations of the bipolar transistor switching means are compensated by a FET current source (T11, T12) coupled thereto. To provide a linear relationship of frequency vs. voltage over wide voltage range, the bipolar transistor switching means is further regulated by a plurality of resistor and diode networks (R4, Q1, Q2; R5, Q3, Q4).
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公开(公告)号：DE69108270D1
公开(公告)日：1995-04-27
申请号：DE69108270
申请日：1991-01-18
Applicant: IBM
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公开(公告)号：DE69108270T2
公开(公告)日：1995-10-19
申请号：DE69108270
申请日：1991-01-18
Applicant: IBM
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公开(公告)号：DE69022122D1
公开(公告)日：1995-10-12
申请号：DE69022122
申请日：1990-06-06
Applicant: IBM
Inventor： CHUNG PAUL WINGSHING , GEE RALPH LEONARD , LANG LUKE CHUNG KUANG , SABER PAIK
Abstract: A means for setting the free-running frequency of a voltage controlled oscillator (VCO) (12) without requiring laser trimming or the like is described. The VCO forms part of an interconnected phase-locked loop (PLL) and frequency-locked loop (FLL). At system power on, the PLL is automatically disabled and a digital-to-analog (DAC) (11) in the PLL is set to a value corresponding substantially to the centre of a preselected lock range. The FLL, which includes a second DAC (10), then operates to generate a bias voltage for incrementing or decrementing the VCO output frequency until the VCO pulse count stored in a register equals an expected count; whereupon the VCO will be set at its free-running frequency. When the PLL is enabled, a phase error generator (14) generates a digital phase error signal from the input data. A digital integrator (19) converts the phase error signal to a digital frequency error signal. These error signals are added and the result is supplied to the DAC in the PLL for providing an analog output indicative of PLL frequency error. The outputs from both DACs are summed and the resultant current is converted to a bias voltage to adjust the VCO frequency as necessary for normally maintaining it within said lock range. If the VCO frequency deviates from said range, the frequency error signal to the PLL DAC is zeroed, and the frequency error signal is supplied to the FLL DAC. The phase error signal from the PLL DAC and the signal from the FLL DAC as modified by the frequency error signal are summed, and the resultant current in converted to a bias voltage to adjust the VCO frequency to within said lock range.
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公开(公告)号：DE3888100T2
公开(公告)日：1994-09-15
申请号：DE3888100
申请日：1988-11-08
Applicant: IBM
Inventor： CHUNG PAUL WINGSHING , SABER PAIK NMN
Abstract: A voltage controlled oscillator (VCO) having high temperature stability and wide voltage/frequency linearity comprises a multivibrator switched by bipolar transistor switching means (Q9, Q10). Temperature fluctuations of the bipolar transistor switching means are compensated by a FET current source (T11, T12) coupled thereto. To provide a linear relationship of frequency vs. voltage over wide voltage range, the bipolar transistor switching means is further regulated by a plurality of resistor and diode networks (R4, Q1, Q2; R5, Q3, Q4).
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