ENHANCED HIGH PERFORMANCE PCI
    1.
    发明专利

    公开(公告)号:CA2236060A1

    公开(公告)日:1998-12-11

    申请号:CA2236060

    申请日:1998-04-28

    Applicant: IBM

    Abstract: A peripheral component interconnect (PCI) bus is adapted for differential signal ling. Two signal lines are providing for each bus signal and information is encoded as either a polarity or a magnitude of a voltage difference between the two signal lines. En hanced PCI compliant devices include drivers and receivers capable of differential sign alling. The resulting bus architecture supports clocking data on both edges as well as sourc e synchronous clocking. The enhanced PCI bus architecture also supports data block ing, pacing, split transactions, and synchronization commands.

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