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Patent Agency Ranking
公开(公告)号：CA985424A
公开(公告)日：1976-03-09
申请号：CA159299
申请日：1972-12-18
Applicant: IBM
Inventor： BELL NOEL J , COOPER RONALD J , NAGLE FREDERICK P , NEWLIN FRANK A III , STADLER WILLIAM M
Abstract: The described apparatus is interposed between the modem or line adapter of a synchronous transmission line and the data processor and will identify for the processor, the code in which data is being received. The discriminator is particularly useful in a system where any one of a number of data terminals using different transmission codes can be connected to one of the ports of the processor. In use, the discriminator examines, at each bit time, the last grouping of bits it has received to detect the presence of a code identifying character. When it detects one such character, the system waits until another character is received to determine if the second character is consistent with the tentatively identified code. If not, the system resets to continue looking for a new identification character. The system continues hunting until a transmission code is fully identified. The discriminator then notifies the processor of the code in which the data is being received.
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公开(公告)号：CA1244556A
公开(公告)日：1988-11-08
申请号：CA500462
申请日：1986-01-27
Applicant: IBM
Inventor： BURRUS GILBERT S JR , COOPER RONALD J , MARR MICHAEL R , MARSICO MARIO A , PESCATORE JOHN C , SULLIVAN PAUL D
Abstract: MULTIPLE PORT COMMUNICATIONS ADAPTER APPARATUS A multi-port communications controller and variable protocol adapter is described. The adapter utilizes a user programmable pluggable programming cartridge for defining individual communications port data service characteristics. The port data service characteristics are interpreted by a microprocessor which manages the interchange from port to port and to or from memory or a host system. Direct memory access or interrupt driven memory access modes of operation are individually selectable for each individual in bound and out bound communications channel. The communications protocols employed at each port may be of any standard type with the microprocessor in the adapter making the appropriate conversion. Communication speeds can be automatically recognized and matched for each port also. An arbitration processor for both DMA and interrupt driven data transfer services is included as he heart of the communications adapter design to provide the capability of individualized control over each in bound and out bound channel's mode of data transfer service for the optimum mode of operation for each port and type of data service required.
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公开(公告)号：CA1251572A
公开(公告)日：1989-03-21
申请号：CA505399
申请日：1986-03-27
Applicant: IBM
Inventor： BURRUS GILBERT S JR , COOPER RONALD J , MARR MICHAEL R , MARSICO MARIO A , PESCATORE JOHN C , SULLIVAN PAUL D
Abstract: MULTIPLE PORT SERVICE EXPANSION ADAPTER FOR A COMMUNICATIONS CONTROLLER Bus interconnection between the system busses of a multi-port communications controller and the busses of one or more multi-port adapters is facilitated with a new architecture for providing an interconnection controller. A programmably adjustable adapter and port interface controller is combined via a scannerless communications controller with a bus interconnection control logic that handles both DMA and interrupt mode data transfers for a large number of channels. The invention provides an improved means for transferring data to or from numerous communication channel devices within a processor based communications system in such a manner that the optimum mode of data transfer may be individually programmed for each channel as system environment conditions demand.
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公开(公告)号：CA1231459A
公开(公告)日：1988-01-12
申请号：CA481733
申请日：1985-05-16
Applicant: IBM
Inventor： COOPER RONALD J , MARSICO MARIO A , MATLACK RICHARD C JR , PESCATORE JOHN C , SMITH ROBERT L JR
IPC: G06F11/00 , G06F11/10 , G06F11/22 , G06F11/267 , G06F11/273 , G06F13/00 , G06F13/12 , G06F13/26 , G06F13/28 , G06F13/32 , G06F13/364 , H04L5/22 , H04L29/00 , H04L29/02
Abstract: SCANNERLESS MESSAGE CONCENTRATOR AND COMMUNICATIONS MULTIPLEXER A communications concentrator and message multiplexer featuring direct access from the communications adapters to main memory via direct memory access means which eliminates the usual scanner or polling facility in a concentrator or multiplexer is described. A control microprocessor manages the allocation of memory, the conversion of message protocols and the servicing of interrupts to a plurality of port interface adapter microprocessors. The interface adapter microprocessors directly set up and control the DMA operation instead of having the DMA operation controlled by the control processor. One of the port adapters serves as a service adapter over a dedicated interface allowing a remote diagnostician access to internal registers in the control processor system, access to a dedicated read only storage for servicing, and logical interface to the main control processor for the purpose of entering instructions and directing functional operations to test each component of the system.
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公开(公告)号：CA1243125A
公开(公告)日：1988-10-11
申请号：CA500463
申请日：1986-01-27
Applicant: IBM
Inventor： BURRUS GILBERT S JR , COOPER RONALD J , MARR MICHAEL R , PESCATORE JOHN C , MARSICO MARIO A
Abstract: MULTIPLE PORT INTEGRATED DMA AND INTERRUPT CONTROLLER AND ARBITRATOR Both DMA access and character interrupt driven access Modes of service are provided to multiple communication ports by an integrated arbitration DMA/interrupt controller utilizing its own resident randomly accessible memory. Pipelined logic control architecture for handling service mode adaptations for each individual port and for managing memory accesses to main system memory enables the use of the random access memory with its inherent time delays in a manner that virtually eliminates the effect of any time delay in overall memory access throughput.
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