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公开(公告)号:DE3175351D1
公开(公告)日:1986-10-23
申请号:DE3175351
申请日:1981-10-28
Applicant: IBM , IBM FRANCE
Inventor: BREZZO BERNARD , CALVIGNAC JEAN , DAMBRICOURT RICHARD , MASCLET ANDRE , SANCHE JEAN-PIERRE
Abstract: A line scanning device which operates under the control of a microprocessor connected to a control memory in which a memory location area is assigned to each line is provided for a line adapter in a communication controller for receiving or sending message bits in series from or to terminals connected to the lines using any protocols. It comprises a first store which includes a first and a second memories, an area being assigned to each line in each of the memories which can be read and written in the same time and a second store which includes a single memory in which a storage location area is assigned to each line. These stores are addressed by a control and address unit which includes first and second address counters under the control of an elementary time counter, the first counter outputting the address information relating to the first store during time t provided for scanning a line, and the second counter outputting the address information relative to the second store during time nt, n being at least equal to 4, and control circuitry receiving said address information and the elementary time information for providing at the outputs of the control and address unit, memory address and read/write control information at times selected during the scanning period and sequentially, the addresses of the present lines which are scanned.
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公开(公告)号:DE3889214D1
公开(公告)日:1994-05-26
申请号:DE3889214
申请日:1988-01-22
Applicant: IBM
Inventor: BADAOUI MOHAMED , DAMBRICOURT RICHARD , FRANQUENOUILLE JEAN-PAUL , GARCIA CHRISTIAN , SPALMACIN-ROMA SYLVIE , GRANGER YVES
Abstract: A scanning protocol is provided for the scanning of a plurality of the serial transmission lines (26) connecting users' devices to the scanning means (10, 16, 17) of a communication device, said lines being coupled to the scanning means through line interface couplers (LICs) (20) having each a wired address (n, n min , ...) known to the scanning means. This scanning protocol requires that for each LIC configuration, a given LICn, having a wired address n, be re-addressable with a logical address n min corresponding to the wired address of any other active LICn min , in order to determine, for said LIC configuration, the shortest possible scanning scheme including all the active LICs. The re-addressing of a LICn of wired address n, with a logical address n min , includes the steps of : - resetting the LICn to be affected a logical address n min , - setting the logical address n min into LICn; - locking said logical address n min into said LICn, and - enabling the lines (26) connected to LICn re-addressed with logical address n min .
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公开(公告)号:DE3889214T2
公开(公告)日:1994-11-17
申请号:DE3889214
申请日:1988-01-22
Applicant: IBM
Inventor: BADAOUI MOHAMED , DAMBRICOURT RICHARD , FRANQUENOUILLE JEAN-PAUL , GARCIA CHRISTIAN , SPALMACIN-ROMA SYLVIE , GRANGER YVES
Abstract: A scanning protocol is provided for the scanning of a plurality of the serial transmission lines (26) connecting users' devices to the scanning means (10, 16, 17) of a communication device, said lines being coupled to the scanning means through line interface couplers (LICs) (20) having each a wired address (n, n min , ...) known to the scanning means. This scanning protocol requires that for each LIC configuration, a given LICn, having a wired address n, be re-addressable with a logical address n min corresponding to the wired address of any other active LICn min , in order to determine, for said LIC configuration, the shortest possible scanning scheme including all the active LICs. The re-addressing of a LICn of wired address n, with a logical address n min , includes the steps of : - resetting the LICn to be affected a logical address n min , - setting the logical address n min into LICn; - locking said logical address n min into said LICn, and - enabling the lines (26) connected to LICn re-addressed with logical address n min .
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公开(公告)号:CA1191268A
公开(公告)日:1985-07-30
申请号:CA414119
申请日:1982-10-25
Applicant: IBM
Inventor: BREZZO BERNARD , CALVIGNAC JEAN , DAMBRICOURT RICHARD , MASCLET ANDRE , SANCHE JEAN-PIERRE
Abstract: A COMMUNICATION LINE SCANNING DEVICE FOR A COMMUNICATION CONTROLLER A line scanning device for the line adapter of a communication controller comprises three memories addressable by an address select and control device which sequentially generates the address of the lines to be scanned on line and the addresses of the memories and read/write control signals. The memories are associated to two logic circuits. One circuit is connected to the lines to be scanned and the other is connected to a microprocessor associated with the scanning device. In each memory, location areas are assigned to each line. The message is processed in assembly at the bit level and in assembly at the character level. The exchange operation with the microprocessor is performed in cycle steal mode between assembly and the microprocessor control memory.
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