公开(公告)号：DE69220543D1

公开(公告)日：1997-07-31

申请号：DE69220543

申请日：1992-04-11

Applicant: IBM

Inventor： BRONNER GARY B ,  DHONG SAN H ,  HWANG WEI

IPC: H01L21/8242 ,  H01L21/76 ,  H01L27/10 ,  H01L27/108

Abstract: Disclosed is a Dynamic Random Access Memory (DRAM) cell which includes a storage capacitor (28, 32, 34) disposed in a trench (28) formed in a semiconductor substrate (24, 30) and an access transistor (12) disposed in a well (18) which is opposite in conductivity type to that of the substrate (24, 30) and a buried oxide collar (36) which surrounds an upper portion of the trench (28).

公开(公告)号：DE69220543T2

公开(公告)日：1998-01-15

申请号：DE69220543

申请日：1992-04-11

Applicant: IBM

Inventor： BRONNER GARY B ,  DHONG SAN H ,  HWANG WEI

IPC: H01L21/8242 ,  H01L21/76 ,  H01L27/10 ,  H01L27/108

Abstract: Disclosed is a Dynamic Random Access Memory (DRAM) cell which includes a storage capacitor (28, 32, 34) disposed in a trench (28) formed in a semiconductor substrate (24, 30) and an access transistor (12) disposed in a well (18) which is opposite in conductivity type to that of the substrate (24, 30) and a buried oxide collar (36) which surrounds an upper portion of the trench (28).