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公开(公告)号:US2907680A
公开(公告)日:1959-10-06
申请号:US71080258
申请日:1958-01-23
Applicant: IBM
Inventor: SMITH ROBERT S , EGGENBERGER JOHN S , SCOW KENNETH B
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公开(公告)号:US3089222A
公开(公告)日:1963-05-14
申请号:US256359
申请日:1959-12-29
Applicant: IBM
Inventor: EGGENBERGER JOHN S
IPC: H01F41/34
CPC classification number: H01F41/34 , Y10T29/49069
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公开(公告)号:US3070782A
公开(公告)日:1962-12-25
申请号:US77625958
申请日:1958-11-25
Applicant: IBM
Inventor: EGGENBERGER JOHN S
IPC: H01F41/34
CPC classification number: H01F41/34 , Y10T29/4902 , Y10T29/49069
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公开(公告)号:US3047423A
公开(公告)日:1962-07-31
申请号:US78111758
申请日:1958-12-17
Applicant: IBM
Inventor: EGGENBERGER JOHN S , LLOYD JOHN C , SMITH ROBERT S
CPC classification number: H01F41/26 , G11C11/5607 , Y10S428/90
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公开(公告)号:US3019125A
公开(公告)日:1962-01-30
申请号:US77465658
申请日:1958-11-18
Applicant: IBM
Inventor: EGGENBERGER JOHN S , LLOYD JOHN C , SMITH ROBERT S
CPC classification number: H01F10/14 , H01F10/28 , Y10S428/90 , Y10S428/912 , Y10S428/928 , Y10T29/49069 , Y10T428/12465 , Y10T428/2457 , Y10T428/265
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公开(公告)号:FR2389198A1
公开(公告)日:1978-11-24
申请号:FR7809187
申请日:1978-03-23
Applicant: IBM
Inventor: EGGENBERGER JOHN S , PATEL ARVIND M
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公开(公告)号:CA1309495C
公开(公告)日:1992-10-27
申请号:CA603836
申请日:1989-06-23
Applicant: IBM
Inventor: EGGENBERGER JOHN S , HODGES PAUL , PATEL ARVIND M
Abstract: A method is disclosed for correcting multibyte errors in a magnetic medium on which data is recorded in variable length blocks that comprise subblocks of data bytes and corresponding check bytes and include error correction code (ECC) for which ECC syndromes are generated during reading. A sequence of N sequential parity check bytes is written at the end of each block. After ECC syndromes are generated during reading, parity syndromes are generated by comparing parity check bytes computed from data bytes and check bytes as read with the parity check bytes as written. When a long-burst error occurs, a pointer points to the first of the N consecutive bytes in a block that could have been influenced by the error burst. After correcting correctable errors in all subblocks not affected by the N bytes identified by the pointer, and adjusting the parity syndromes for errors thus corrected, the adjusted parity syndromes are used to correct the errors in the N bytes indicated by the pointer. Unused ECC syndromes are then adjusted for errors corrected by the adjusted parity syndromes and used to correct all correctable errors then remaining. SA9-88-041
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公开(公告)号:CA1262189A
公开(公告)日:1989-10-03
申请号:CA532490
申请日:1987-03-19
Applicant: IBM
Inventor: EGGENBERGER JOHN S , PATEL ARVIND M
Abstract: METHOD AND APPARATUS FOR IMPLEMENTING OPTIMUM PRML CODES Rate 8/9, constrained codes having run length limitation parameters (0, 4/4) and (0, 3/63 are provided for any partial response (PR) signaling system employing maximum likelihood (ML) detection.
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公开(公告)号:CA1081849A
公开(公告)日:1980-07-15
申请号:CA332286
申请日:1979-07-20
Applicant: IBM
Inventor: EGGENBERGER JOHN S , HODGES PAUL
IPC: H03K13/24
Abstract: SEQUENTIAL ENCODING AND DECODING OF VARIABLE WORD LENGTH, FIXED RATE DATA CODES A method of encoding or decoding data in a code of variable length words and fixed rate comprises the steps of (1) initially entering a constant number (k) of input bits into a shift register; (2) entering a constant number (m) of input bits into the shift register; (3) encoding or decoding a constant number (n) of bits in response to the contents of the shift register; and (4) repeating steps (2) and (3) until the input bits are exhausted. To complete the encoding or decoding, steps (2) and (3) are further repeated with dummy input bits until (k) dummy bits have been entered into the shift register. The encoding or decoding of (n) bits may be affected by auxiliary state variables which account for the position in the shift register of the boundary between words.
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公开(公告)号:CA1075817A
公开(公告)日:1980-04-15
申请号:CA223702
申请日:1975-04-02
Applicant: IBM
Inventor: EGGENBERGER JOHN S , HODGES PAUL
IPC: H03M7/14 , G06F5/00 , G11B20/14 , H03M7/00 , H03M7/30 , H03M7/40 , H03M7/46 , H04L23/00 , H04L25/49 , H03K13/24
Abstract: SEQUENTIAL ENCODING AND DECODING OF VARIABLE WORD LENGTH, FIXED RATE DATA CODES A method of encoding or decoding data in a code of variable length words and fixed rate comprises the steps of (1) initially entering a constant number (k) of input bits into a shift register; (2) entering a constant number (m) of input bits into the shift register; (3) encoding or decoding a constant number (n) of bits in response to the contents of the shift register; and (4) repeating steps (2) and (3) until the input bits are exhausted. To complete the encoding or decoding, steps (2) and (3) are further repeated with dummy input bits until (k) dummy bits have been entered into the shift register. The encoding or decoding of (n) bits may be affected by auxiliary state variables which account for the position in the shift register of the boundary between words.
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