公开(公告)号：US3156875A

公开(公告)日：1964-11-10

申请号：US11717661

申请日：1961-06-14

Applicant: IBM

Inventor： FIORINO BENJAMIN C ,  ALFRED BRUNSCHWEIGER

IPC: H03K4/502

CPC classification number: H03K4/502

公开(公告)号：US3864583A

公开(公告)日：1975-02-04

申请号：US35382473

申请日：1973-04-23

Applicant: IBM

Inventor： FIORINO BENJAMIN C

IPC: H03K3/287 ,  H04L25/06 ,  H03K5/18 ,  H03D3/18 ,  H03K5/153

CPC classification number: H04L25/06 ,  H03K3/287

Abstract: Data represented in digital signals are detected by integration techniques; each integration occurs over the entire detection or sample period. Recovery of each integration circuit occurs in a subsequent sample period. A pair of integration circuits forming one integrator are provided for each state of the digital signal with the integrators being alternately actuated. In a two-state signal, two integrators are provided; each integrates during a different signal state. To determine data contained in the signal, an amplitude comparison is made between the output of the analog-OR of each integrator of the several signal states. Also disclosed is an extremely sensitive comparator latch which utilizes the high gain of a switching circuit for enhancing amplitude comparison. A clocking system alternately actuating pairs of the integrators is also disclosed.

Abstract translation: 用数字信号表示的数据通过集成技术检测; 每个整合发生在整个检测或采样周期。 每个积分电路的恢复在随后的采样周期中发生。 为数字信号的每个状态提供形成一个积分器的一对积分电路，其中积分器被交替致动。 在两状态信号中，提供两个积分器; 每个在不同的信号状态下进行积分。 为了确定信号中包含的数据，在几个信号状态的每个积分器的模拟或输出之间进行幅度比较。 还公开了一种非常敏感的比较器锁存器，其利用开关电路的高增益来增强幅度比较。 还公开了交替驱动成对的积分器的计时系统。

公开(公告)号：US3670304A

公开(公告)日：1972-06-13

申请号：US3670304D

申请日：1970-09-28

Applicant: IBM

Inventor： ANDRESEN ROLF ,  FIORINO BENJAMIN C ,  NICCORE FRED W

IPC: G11B20/18 ,  H04L27/08 ,  G06K5/00

CPC classification number: H04L27/08 ,  G11B20/18

Abstract: A data signal read from magnetic tape is converted from an analog signal into a digital signal by hard limiting. This hardlimited data signal is combined with an indication as to whether the amplitude of the digital signal is above a predetermined threshold and then passed to the control unit operating with the tape drive. The control unit, in turn, detects the data, checks for parity error, phase error, and amplitude error and provides control signals back to the tape drive. These control signals are used to change the predetermined threshold used by the tape drive. The predetermined threshold is changed by these control signals in accordance with detection of a history of good data and in accordance with errors in the record block.

Abstract translation: 从磁带读取的数据信号通过硬限制从模拟信号转换成数字信号。 该硬限制数据信号与数字信号的振幅是否高于预定阈值的指示组合，然后传送到与磁带驱动器一起操作的控制单元。 控制单元依次检测数据，检查奇偶校验错误，相位误差和振幅误差，并将控制信号提供回磁带驱动器。 这些控制信号用于改变磁带驱动器使用的预定阈值。 根据检测到良好数据的历史并根据记录块中的错误，这些控制信号改变预定阈值。

公开(公告)号：US3909630A

公开(公告)日：1975-09-30

申请号：US43580374

申请日：1974-01-23

Applicant: IBM

Inventor： FIORINO BENJAMIN C ,  MARINO PETER T

IPC: H04L25/06 ,  H03K17/00

CPC classification number: H04L25/06

Abstract: An H-configured integration circuit includes a pair of squelch transistors forming two legs of the H with a pair of integrating switch transistors forming the other two legs. A pair of capacitors having a common terminal to a reference potential form the crossbar in the H. Rapid integration and differentially balanced squelching is provided for both capacitors. A phase shift measuring circuit shares the squelch reference with the integration circuit such that any variation in the reference on the integrator also adjusts the phase shift measuring circuit. Such circuit differentially compares the integrated values from the integrators with a reference derived from the squelch for indicating phase shift of the input integrated signal with respect to a timing reference.

Abstract translation: H配置的积分电路包括一对形成H的两条支路的静噪晶体管，一对形成另外两条支路的积分开关晶体管。 具有参考电位的公共端的一对电容器形成H中的交叉开关。为两个电容器提供了快速积分和差分平衡镇压。 相移测量电路与积分电路共享静噪参考，使得积分器上的参考的任何变化也调整相移测量电路。 这种电路将来自积分器的积分值与从静噪导出的参考值进行差分比较，用于指示输入积分信号相对于定时参考的相移。

公开(公告)号：US3506923A

公开(公告)日：1970-04-14

申请号：US3506923D

申请日：1967-01-12

Applicant: IBM

Inventor： AMBRICO LOUIS E ,  FIORINO BENJAMIN C

IPC: H03M5/12 ,  G11B20/14 ,  H03M7/04 ,  H04L7/00 ,  H04L7/033 ,  H04L25/49 ,  H03K13/00

CPC classification number: H04L25/4904 ,  G11B20/1419 ,  H04L7/0332

公开(公告)号：CA946518A

公开(公告)日：1974-04-30

申请号：CA99920

申请日：1970-12-07

Applicant: IBM

Inventor： FIORINO BENJAMIN C ,  RODRIGUEZ JUAN A

IPC: H03D13/00 ,  H03K5/26 ,  H04L7/00 ,  H04L7/033 ,  H03B3/04

Abstract: A digital time sampling phase comparator for use in a data receiving system to generate error correction pulses which are used to synchronize the generation of clock pulses with incoming data pulses. The phase comparator is time sampling because it generates error correction pulses whose time durations are equal to the time differences between transitions of input data pulses and reference transitions of generated clock pulses. In addition, the comparator has a noise rejection feature which removes from the correction pulses errors caused by random noise in the input data. Noise rejection is achieved by generating pulses for each positive and negative voltage transition of the input data pulses and ANDing these generated pulses with either a data or an inverted data pulse, depending upon whether the detected transition is positive or negative.

公开(公告)号：DE68906047D1

公开(公告)日：1993-05-27

申请号：DE68906047

申请日：1989-02-07

Applicant: IBM

Inventor： DIMATTEO JOSEPH HOWARD ,  FIORINO BENJAMIN C ,  FENNEMA ALAN AUGUST ,  LEWKOWICZ JULIAN

IPC: G11B7/085 ,  G11B7/09 ,  G11B7/095 ,  G11B7/08

Abstract: A focus acquire circuit for use in optical systems, such as optical data recorders and players, uses up to three parameter signals to indicate an in-focus condition. The zero crossing of a focus error signal is combined with a signal indicating that the focus error signal has approached a peak value and with a signal indicating a change in laser drive signal amplitude to indicate an in-focus condition. Various circuit details are illustrated showing how the three parameters can be combined together for indicating an in-focus condition.

公开(公告)号：CA1007712A

公开(公告)日：1977-03-29

申请号：CA122726

申请日：1971-09-14

Applicant: IBM

Inventor： FIORINO BENJAMIN C

IPC: H04L25/06

公开(公告)号：CA944067A

公开(公告)日：1974-03-19

申请号：CA122731

申请日：1971-09-14

Applicant: IBM

Inventor： ANDRESEN ROLF ,  FIORINO BENJAMIN C ,  NICCORE FRED W

IPC: G11B20/18 ,  H04L27/08

Abstract: A data signal read from magnetic tape is converted from an analog signal into a digital signal by hard limiting. This hard-limited data signal is combined with an indication as to whether the amplitude of the digital signal is above a predetermined threshold and then passed to the control unit operating with the tape drive. The control unit, in turn, detects the data, checks for parity error, phase error, and amplitude error and provides control signals back to the tape drive. These control signals are used to change the predetermined threshold used by the tape drive. The predetermined threshold is changed by these control signals in accordance with detection of a history of good data and in accordance with errors in the record block.

公开(公告)号：CA718503A

公开(公告)日：1965-09-21

申请号：CA718503D

Applicant: IBM

Inventor： BRUNSCHWEIGER ALFRED ,  FIORINO BENJAMIN C