公开(公告)号：DE69021899D1

公开(公告)日：1995-10-05

申请号：DE69021899

申请日：1990-01-11

Applicant: IBM

Inventor： FOGG RICHARD G ,  MATHIS JOSEPH RICHARD ,  NICHOLSON JAMES OTTO

IPC: G06F13/28

Abstract: A DMA controller is described which has an attached, dedicated memory. Data objects are stored in this memory and are linked to one another, by pointers. Each data object contains DMA block transfer control parameters. A single block transfer is made up of several separate transfers, with each separate transfer defined by one data object. The single block transfer is defined by linking several data objects into a list. The DMA controller consecutively performs the transfers in a linked list without requiring control by a system central processor.

公开(公告)号：DE69021899T2

公开(公告)日：1996-04-18

申请号：DE69021899

申请日：1990-01-11

Applicant: IBM

Inventor： FOGG RICHARD G ,  MATHIS JOSEPH RICHARD ,  NICHOLSON JAMES OTTO

IPC: G06F13/28

Abstract: A DMA controller is described which has an attached, dedicated memory. Data objects are stored in this memory and are linked to one another, by pointers. Each data object contains DMA block transfer control parameters. A single block transfer is made up of several separate transfers, with each separate transfer defined by one data object. The single block transfer is defined by linking several data objects into a list. The DMA controller consecutively performs the transfers in a linked list without requiring control by a system central processor.