公开(公告)号：JPH06250937A

公开(公告)日：1994-09-09

申请号：JP2110593

申请日：1993-02-09

Applicant: IBM

Inventor： FUJITA NORIO ,  FUJITA NOBUHITO ,  YAMAZAKI SATORU ,  AIDA MITSUHIRO

IPC: G06F11/10 ,  G06F12/16

Abstract: PURPOSE: To suppress the increase of the number of times of memory access at the time of adding an ECC code to each data with specific length and operating an ECC processing, and to prevent the executing speed of a program from being sharply deteriorated even at the time of executing the ECC processing. CONSTITUTION: At the time of adding an ECC code to each data with specific bit length and writing the data in a memory element 20, when the length of writing data from a CPU 10 is less than the specific bit length, data previously read from the memory element 20 are held in a mean 42 different from the memory element 20, and data with the specific bit length are generated based on the held data and the writing data from the CPU 10. Thus, the ECC processing can be attained even when the reading from the memory is not necessarily operated before the writing in the memory.