公开(公告)号：DE3567321D1

公开(公告)日：1989-02-09

申请号：DE3567321

申请日：1985-09-24

Applicant: IBM

Inventor： GALIE JOHN ROBERT ,  GOTH GEORGE RICHARD ,  HANSEN THOMAS ADRIAN ,  VILLETTO ROBERT THOMAS

IPC: H01L21/28 ,  H01L21/027 ,  H01L21/3205 ,  H01L21/762 ,  H01L21/768 ,  H01L21/90

Abstract: The present method discloses the steps to form metal device contact studs (28) between regions of a semiconductor device, such as an NPN vertical bipolar transistor (10), and the first level metal, the studs overlapping both a contact region, such as the base (15) or the collector (26), and an adjacent polyimide-filled trench (23). The method comprises the following steps:a) applying a lift-off mask exposing said contact region and adjacent trench without attacking the polyimide fill,b) blanket depositing the stud forming metal onto the whole structure,c) lifting off said mask and the overlying metal,d) blanket depositing a second dielectric layer onto the whole structure, the thickness of said second layer being approximately the stud height,e) removing said second dielectric layer until the top surface of the highest contact stud is exposed andf) polishing both the metal and said second dielectric layer to leave a substantially planarized structure ready for further personalization.