PROCESS FOR REACTIVE ION-ETCHING OF SILICON

    公开(公告)号:DE3065407D1

    公开(公告)日:1983-12-01

    申请号:DE3065407

    申请日:1980-02-08

    Applicant: IBM

    Abstract: Disclosed is an improved Reactive Ion Etch (RIE) technique for etching polysilicon or single crystal silicon as must be done in Very Large Scale Integration (VLSI) using silicon technology. It teaches the use of an etch gas that consists of a mixture of sulfur hexafluoride (SF6) and chlorine (Cl2) diluted with inert gas. This etch gas allows an RIE process which combines the very desirable features of selectivity (high Si/SiO2 etch rate ratio) and directionality which creates vertical side walls on the etched features. Vertical side walls mean no mask undercutting, hence zero etch bias. It is particularly applicable to device processing in which micron or sub-micron sized lines must be fabricated to extremely close tolerances. It is a distinct improvement over wet chemical etching or plasma etching as it is conventionally applied.

    METHOD FOR SELECTIVE REACTIVE ION ETCHING OF SILICON

    公开(公告)号:DE3160740D1

    公开(公告)日:1983-09-15

    申请号:DE3160740

    申请日:1981-03-06

    Applicant: IBM

    Abstract: The method teaches the etching of the unmasked areas of a silicon body covered partly by a mask of an insulating material in an R.F. plasma consisting essentially of X parts SiF4, Y parts Cl2, and Z parts of an inert gas wherein X + Y + Z is essentially one hundred, X + Y is less than about 25 parts, and X and Y are respectively greater than zero. The mask material - preferably SiO2 - is selected according to its resistance against the R.F. plasma. The etching is directional perpendicularly to the surface of the silicon body. … The method is used in forming Very Large Scale Integration (VLSI) structures.

Patent Agency Ranking