公开(公告)号：JPH0629488A

公开(公告)日：1994-02-04

申请号：JP6839692

申请日：1992-03-26

Applicant: IBM

Inventor： GEERII BERA BURONAA ,  SAN FUU DON ,  UEI WAN

IPC: H01L21/76 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

Abstract: PURPOSE: To make holding time of cell to be long to the utmost and minimize leak current by enclosing at least one storage means extending from a reverse conductive area to the upper part of a substrate by the embedded insulation collar located within the reverse conductive area. CONSTITUTION: This cell contains a field effect transistor 12 and a trench capacitor 14, which are formed within a semiconductor substrate 16. The transistor 12 is formed within an n-well 18 and it contains a p type source area 20 which is heavily doped. and a drain area 22. It is located within a part 24 of p type of the substrate 16 having the n-well 18 that is lightly doped A memory cell 10 is isolated from other resembling memory cells formed on the substrate 16 by a backward oxide area 26. Then an embedded oxide collar 36 encloses the upper part of a trench 28. Thus, the oxide collar 36 can prevent the depletion of side wall of the trench 28 and minimize leak current.