公开(公告)号：CA1191973A

公开(公告)日：1985-08-13

申请号：CA440689

申请日：1983-11-08

Applicant: IBM

Inventor： COTTRELL PETER E ,  GEIPEL HENRY J JR ,  KENNEY DONALD M

IPC: H01L27/08 ,  H01L21/00 ,  H01L21/76 ,  H01L21/762 ,  H01L21/82 ,  H01L21/8238 ,  H01L29/78 ,  H01L21/02

Abstract: ABS Process for Making Complementary Transistors A simple process is provided for making a planar CMOS structure wherein isolation regions required by bulk CMOS structures are first formed, an N channel device field region is self-aligned to an N well region in a semiconductor substrate and a refractory material is twice defined for forming P and N channels, the first definition masking P channel source and drain regions while defining the N channel and the second definition defining the P channel while using a photoresist layer to mask the N channel. In the process, a technique which uses a single mask level defines the well region and self-aligns the necessary field doping to the well region to provide closely spaced N and P channel devices.