ENHANCED SACRIFICIAL LAYER ETCHING TECHNIQUE FOR MICROSTRUCTURE RELEASE
    1.
    发明申请
    ENHANCED SACRIFICIAL LAYER ETCHING TECHNIQUE FOR MICROSTRUCTURE RELEASE 审中-公开
    用于微结构释放的增强型真空层蚀刻技术

    公开(公告)号:WO02064495A3

    公开(公告)日:2003-06-05

    申请号:PCT/IB0200395

    申请日:2002-02-08

    CPC classification number: B81C1/00476 B81C2201/0109

    Abstract: A method for at least partially releasing microstructures from a substrate is provided. The method comprises the steps of: a) providing a substrate (2); b) depositing onto said substrate (2) a first layer (4) and a second layer (6), the first layer (4) and the second layer (6) each comprising an electrically conducting material and each having a different oxido-reduction potential; c) electrically connecting the first layer (4) and the second layer (6); d) forming a microstructure (8) on the first (4) and second (6) layers deposited in step b) to produce an intermediate structure (10); and e) electrochemically etching said second layer (6) by immersing the intermediate structure (10) formed in step d) in an electrolyte (12).

    Abstract translation: 提供了一种至少部分地从基板上释放微结构的方法。 该方法包括以下步骤:a)提供衬底(2); b)在所述基板(2)上沉积第一层(4)和第二层(6),所述第一层(4)和所述第二层(6)各自包括导电材料并且各自具有不同的氧化还原 潜在; c)电连接第一层(4)和第二层(6); d)在步骤b)中沉积的第一(4)和第二(6)层上形成微结构(8)以产生中间结构(10); 以及e)通过将步骤d)中形成的中间结构(10)浸入电解质(12)中来电化学蚀刻所述第二层(6)。

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