公开(公告)号：IN165132B

公开(公告)日：1989-08-19

申请号：IN506MA1985

申请日：1985-07-03

Applicant: IBM

Inventor： GOHDA YUJI ,  WATANABE SHINPEI

IPC: G09G5/36 ,  G06F3/153 ,  G09G1/14 ,  G09G5/08 ,  G09G1/16

Abstract: A window defining signal which has one state (e.g. high) during the scanning time corresponding to a window area of CRT screen is delayed for a predetermined time. Delayed window defining signal and non delayed window defining signal are XORed to determine time for energizing CRT to display a window borderline.

公开(公告)号：BR9301306A

公开(公告)日：1993-10-05

申请号：BR9301306

申请日：1993-03-25

Applicant: IBM

Inventor： AOKI YUTAKA ,  GOHDA YUJI ,  RACKLEY DARWIN P

IPC: G06T9/00 ,  H03M7/46 ,  H04N1/419 ,  G06F15/62

Abstract: The present invention provides means for increasing the rate at which run length records are decoded and the decoded run length codes are written into a bit map memory of a data processing system. At the time when decoded data is written into the bit map memory, a predetermined code in a flow of run length code data causes the address point in the bit map memory at which the data is to be written to be moved by a predetermined range, the data within the range skipped by the address point remaining unchanged. By this technique the number of write operations to the bit map memory is decreased.

公开(公告)号：DE3586928T2

公开(公告)日：1993-07-15

申请号：DE3586928

申请日：1985-05-10

Applicant: IBM

Inventor： GOHDA YUJI ,  WATANABE SHINPEI

IPC: G09G5/36 ,  G06F3/153 ,  G09G1/14 ,  G09G5/08 ,  G09G1/16

Abstract: A window defining signal which has one state (e.g. high) during the scanning time corresponding to a window area of CRT screen is delayed for a predetermined time. Delayed window defining signal and non delayed window defining signal are XORed to determine time for energizing CRT to display a window borderline.

公开(公告)号：DE3586928D1

公开(公告)日：1993-02-11

申请号：DE3586928

申请日：1985-05-10

Applicant: IBM

Inventor： GOHDA YUJI ,  WATANABE SHINPEI

IPC: G09G5/36 ,  G06F3/153 ,  G09G1/14 ,  G09G5/08 ,  G09G1/16

Abstract: A window defining signal which has one state (e.g. high) during the scanning time corresponding to a window area of CRT screen is delayed for a predetermined time. Delayed window defining signal and non delayed window defining signal are XORed to determine time for energizing CRT to display a window borderline.

公开(公告)号：CA1236601A

公开(公告)日：1988-05-10

申请号：CA478046

申请日：1985-04-01

Applicant: IBM

Inventor： GOHDA YUJI ,  WATANABE SHINPEI

IPC: G09G5/36 ,  G06F3/153 ,  G09G1/14 ,  G09G5/08 ,  G09G1/00

Abstract: WINDOW BORDERLINE GENERATING CIRCUIT FOR CRT DISPLAY The disclosure teaches a circuit, for generating window borderlines for a CRT display, that is capable of generating such borderlines with a simple hardware configuration. A window region defining signal is generated which takes a first state for a period corresponding to a desired window region, and a second state for a period not corresponding to the window region during scanning period of the screen of CRT display. Then the signal is delayed and the delayed signal, and said window region defining signal, are exclusive-ORed to provide a timing signal for generating borderlines of the window.