公开(公告)号：JPH11353177A

公开(公告)日：1999-12-24

申请号：JP11974499

申请日：1999-04-27

Applicant: IBM

Inventor： SAN HOO ZON ,  HAAM PETER HOFSTY ,  KEVIN JOHN NOFUKA ,  JOEL ABRAHAM SILVERMAN

IPC: G06F9/38

Abstract: PROBLEM TO BE SOLVED: To use the register set in a processor more efficiently by mapping sources and target architecture registers in instructions to one group of physical registers and generating a list of tags corresponding to physical registers which are not used here. SOLUTION: One given instruction is loaded to one execution unit and the list of tags corresponding to specific registers which are not used is generated. All the items in a table A for the physical registers are linked on logical OR basis to generate a vector for accurately discriminating which register is used by an instruction being executed. This vector is passed to a structure B which generates the tag of a physical register possibly assigned as a target to a following target although it is not used. The vector structure B generates a bit indicating the adequacy of the generated tag as well. The generated tag becomes ineffective only when the number of usable physical registers is insufficient.