公开(公告)号：DE10045410B4

公开(公告)日：2006-08-10

申请号：DE10045410

申请日：2000-09-14

Applicant: IBM

Inventor： HARTMANN STEVEN PAUL ,  LEE VAN HOA ,  MILLER II MILTON DEVON

IPC: G06F12/08

Abstract: A burst transfer alignment apparatus and method are provided. An interface between the word-aligned subsystem and the double-word-aligned system bus loads a predetermined invalid bit pattern on the system bus corresponding to the second word of the double-word access, in response to a misaligned read. When execution of the predetermined invalid pattern is attempted, an execution exception is thrown. In response the cache line containing the invalid pattern giving rise to the exception is invalidated at the address of the invalid instruction data. Returning from the exception to the address of the invalid pattern, the cache line is refetched. The refetch occurs on an even word boundary, and therefore the refetched cache line transfers properly because the even word address coincides with a double word boundary expected by the bus system.

公开(公告)号：DE10045410A1

公开(公告)日：2001-04-26

申请号：DE10045410

申请日：2000-09-14

Applicant: IBM

Inventor： HARTMANN STEVEN PAUL ,  LEE VAN HOA ,  MILLER II MILTON DEVON

IPC: G06F12/08

Abstract: The cache with one entry is invalidated by loading preset data value representing invalid instruction into the cache line. The invalidated cache line is restored, in response to a recovery instruction. Independent claims are also included for the following: (a) Data processor; (b) Computer program product