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    Information handling system including dynamically merged physical partition and method for operating the same
    1.
    发明专利
    Information handling system including dynamically merged physical partition and method for operating the same 有权
    信息处理系统，包括动态合成物理分析及其操作方法

    公开(公告)号：JP2010009567A

    公开(公告)日：2010-01-14

    申请号：JP2008259468

    申请日：2008-10-06

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： GOODMAN BENJIMAN LEE ,  MILLER II MILTON DEVON ,  NAYAR NARESH

    IPC: G06F9/50 ,  G06F9/46

    CPC classification number: G06F9/5077 ,  G06F12/0646

    Abstract: PROBLEM TO BE SOLVED: To merge two physical partitions in an information handling system. SOLUTION: The information handling system includes information processing nodes in respective physical partitions. A communications bus couples two information processing nodes together. Each node includes hardware resources such as CPUs, memories and I/O adapters. Prior to receiving a command to merge the physical partitions, the communication bus exhibits a disabled state such that the two information processing nodes are effectively disconnected. After receiving the command to merge the physical partitions, the system enables the communication bus to effectively hot-plug the two nodes together. A modified master hypervisor in one node stores data structures detailing the hardware resources of the two nodes. The modified master hypervisor may assign resources from one node to a logical partition in another node. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：合并信息处理系统中的两个物理分区。 解决方案：信息处理系统包括各个物理分区中的信息处理节点。 通信总线将两个信息处理节点耦合在一起。 每个节点包括硬件资源，如CPU，存储器和I / O适配器。 在接收到合并物理分区的命令之前，通信总线呈现禁用状态，使得两个信息处理节点被有效地断开。 在接收到合并物理分区的命令之后，系统使通信总线能够有效地将两个节点热插拔在一起。 一个节点中修改的主管理程序存储详细描述两个节点的硬件资源的数据结构。 修改的主管理程序可以将资源从一个节点分配给另一个节点中的逻辑分区。 版权所有（C）2010，JPO＆INPIT

    2.
    发明专利
    未知

    公开(公告)号：DE10045410B4

    公开(公告)日：2006-08-10

    申请号：DE10045410

    申请日：2000-09-14

    Applicant: IBM

    Inventor： HARTMANN STEVEN PAUL ,  LEE VAN HOA ,  MILLER II MILTON DEVON

    IPC: G06F12/08

    Abstract: A burst transfer alignment apparatus and method are provided. An interface between the word-aligned subsystem and the double-word-aligned system bus loads a predetermined invalid bit pattern on the system bus corresponding to the second word of the double-word access, in response to a misaligned read. When execution of the predetermined invalid pattern is attempted, an execution exception is thrown. In response the cache line containing the invalid pattern giving rise to the exception is invalidated at the address of the invalid instruction data. Returning from the exception to the address of the invalid pattern, the cache line is refetched. The refetch occurs on an even word boundary, and therefore the refetched cache line transfers properly because the even word address coincides with a double word boundary expected by the bus system.

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