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公开(公告)号:DE3886684D1
公开(公告)日:1994-02-10
申请号:DE3886684
申请日:1988-10-13
Applicant: IBM
IPC: H01L21/027 , H01L21/30 , H01L21/336 , H01L27/12 , H01L29/423 , H01L29/49 , H01L29/78 , H01L29/786 , H01L21/84
Abstract: A process for making a self-aligned thin film transistor, comprising the steps of: (a) providing a gate which comprises a glass substrate (1), a transparent electrode (2) on top thereof, and a metal electrode (3) on top of said transparent electrode, (b) forming a stack by depositing over said gate a triple layer structure consisting of gate dielectric material (4), active material (5) and a top passivating dielectric (6), (c) coating the top of said triple layer with a dual-tone photoresist (7), (d) exposing said photoresist from the top through a mask having transparent areas, opaque areas and areas transparent to selective wavelengths, using broad band UV light, (e) developing the photoresist by treatment with a solvent, (f) etching the stack with a liquid etchant through to the glass substrate, (g) exposing the photoresist from the bottom through the glass substrate using near UV light, (h) developing the photoresist with a solvent, and (i) etching off the top passivating layer of the stack.
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公开(公告)号:DE69120858T2
公开(公告)日:1997-01-23
申请号:DE69120858
申请日:1991-04-16
Applicant: IBM
Inventor: ALLEN ROBERT DAVID , WALLRAFF GREGORY MICHAEL , SIMPSON LOGAN LLOYD , HINSBERG WILLIAM DINAN III
IPC: G03F7/004 , G03F7/029 , G03F7/039 , H01L21/027 , C08L33/06
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公开(公告)号:DE69120858D1
公开(公告)日:1996-08-22
申请号:DE69120858
申请日:1991-04-16
Applicant: IBM
Inventor: ALLEN ROBERT DAVID , WALLRAFF GREGORY MICHAEL , SIMPSON LOGAN LLOYD , HINSBERG WILLIAM DINAN III
IPC: G03F7/004 , G03F7/029 , G03F7/039 , H01L21/027 , C08L33/06
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公开(公告)号:DE3886684T2
公开(公告)日:1994-06-23
申请号:DE3886684
申请日:1988-10-13
Applicant: IBM
IPC: H01L21/027 , H01L21/30 , H01L21/336 , H01L27/12 , H01L29/423 , H01L29/49 , H01L29/78 , H01L29/786 , H01L21/84
Abstract: A process for making a self-aligned thin film transistor, comprising the steps of: (a) providing a gate which comprises a glass substrate (1), a transparent electrode (2) on top thereof, and a metal electrode (3) on top of said transparent electrode, (b) forming a stack by depositing over said gate a triple layer structure consisting of gate dielectric material (4), active material (5) and a top passivating dielectric (6), (c) coating the top of said triple layer with a dual-tone photoresist (7), (d) exposing said photoresist from the top through a mask having transparent areas, opaque areas and areas transparent to selective wavelengths, using broad band UV light, (e) developing the photoresist by treatment with a solvent, (f) etching the stack with a liquid etchant through to the glass substrate, (g) exposing the photoresist from the bottom through the glass substrate using near UV light, (h) developing the photoresist with a solvent, and (i) etching off the top passivating layer of the stack.
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