公开(公告)号：CA1060994A

公开(公告)日：1979-08-21

申请号：CA237271

申请日：1975-10-08

Applicant: IBM

Inventor： ASKIN HALUK O ,  JACOBSON EDWARD C ,  LEE JAMES M ,  SONODA GEORGE

IPC: G11C7/02 ,  G11C11/24 ,  G11C11/40

Abstract: D.C. STABLE SEMICONDUCTOR MEMORY CELL Disclosed is a field effect transistor (FET) memory array in which each of the cells forming the array comprises four FET's . The first and second of the four FET devices are cross-coupled while the third and fourth FET devices form loads for the cross coupled pair. D.C. stability is achieved by conditioning the load FET devices into partial conduction during the stand-by state of the memory cell.

公开(公告)号：DE2556831A1

公开(公告)日：1976-06-24

申请号：DE2556831

申请日：1975-12-17

Applicant: IBM

Inventor： ASKIN HALUK O ,  JACOBSON EDWARD C ,  LEE JAMES M ,  SONODA GEORGE

IPC: G11C11/412 ,  G11C7/00 ,  G11C11/40 ,  H01L29/76

Abstract: Disclosed is a field effect transistor (FET) memory array in which each of the cells forming the array comprises four FET's. The first and second of the four FET devices are cross-coupled while the third and fourth FET devices form loads for the cross-coupled pair. D.C. stability is achieved by conditioning the load FET devices into partial conduction during the stand-by state of the memory cell.

公开(公告)号：FR2296243A1

公开(公告)日：1976-07-23

申请号：FR7534720

申请日：1975-11-05

Applicant: IBM

Inventor： ASKIN HALUK O ,  JACOBSON EDWARD C ,  LEE JAMES M ,  SONODA GEORGE

IPC: G11C11/412 ,  G11C11/40

Abstract: Disclosed is a field effect transistor (FET) memory array in which each of the cells forming the array comprises four FET's. The first and second of the four FET devices are cross-coupled while the third and fourth FET devices form loads for the cross-coupled pair. D.C. stability is achieved by conditioning the load FET devices into partial conduction during the stand-by state of the memory cell.