公开(公告)号：DE2755616A1

公开(公告)日：1978-06-29

申请号：DE2755616

申请日：1977-12-14

Applicant: IBM

Inventor： BODNER RONALD EUGENE ,  KISCADEN RICHARD CRAIG

IPC: G06F9/28 ,  G06F9/22 ,  G06F13/32 ,  G06F15/16 ,  G06F9/18

公开(公告)号：DE2755656A1

公开(公告)日：1978-06-29

申请号：DE2755656

申请日：1977-12-14

Applicant: IBM

Inventor： BODNER RONALD EUGENE ,  CROOKS THOMAS LEE ,  KISCADEN RICHARD CRAIG

IPC: G06F12/06 ,  G06F12/10 ,  G06F12/14 ,  G06F11/00

Abstract: Storage protection is provided in a computer system having address translation by loading address translate registers with valid translated addresses and with special addresses. A circuit for generating a storage exception signal is connected to receive all addresses from the translate registers which are addressed by the main storage address and generates a storage exception signal in response to detecting a special address. The address translation mode is provided for both a main storage processor and a control processor with a separate address translate control register for each processor. Address translation is automatically selected based upon interrupt level. Address translation registers are also provided for I/O operations and are controlled independently from and can be in parallel with the task address translation registers.

公开(公告)号：DE2228590A1

公开(公告)日：1973-01-11

申请号：DE2228590

申请日：1972-06-12

Applicant: IBM

Inventor： BROOKS EVERETT GERRISH ,  HARRIS EDWARD RIDGWAY ,  KISCADEN RICHARD CRAIG ,  SCHAFFER WALTER SYLVESTER ,  SOLTIS FRANK GERALD ,  ZIMMERMANN DEAN OWEN

IPC: G06F9/40 ,  G06F9/06