公开(公告)号：JPH113294A

公开(公告)日：1999-01-06

申请号：JP7008098

申请日：1998-03-19

Applicant: IBM

Inventor： MCLAUGHLIN CHARLES ANDREW ,  KITAMORN ALONGKORN

IPC: G06F11/22 ,  G06F11/00 ,  G06F11/267 ,  G06F13/00

Abstract: PROBLEM TO BE SOLVED: To provide a method and a system for separating a fault on a bus. SOLUTION: This method for separating a fault state on the bus of a computer system provided with an input/output (I/O) sub system 18 formed by plural input/output devices for performing communication through the bus includes repetitive classification of the input/output sub system 18 into a prescribed range and separation of the generation source of an error state inside the input/ output sub system 18. Further, the input/output sub-system 18 performs the communication through a peripheral component interconnection PCI bus 21. In the system, the computer system for separating the fault state on the PCI bus 21 is provided with a processing mechanism and an input/output mechanism connected to the processing mechanism. The input/output mechanism is provided with the plural input/output devices 20 and a bridge connected to the PCI bus 21 for performing the communication corresponding to a PCI standard. Further, this system is provided with a fault separating mechanism for identifying the generation source of the error state in the input/output mechanism inside the processing mechanism.

公开(公告)号：JP2002278848A

公开(公告)日：2002-09-27

申请号：JP2002031331

申请日：2002-02-07

Applicant: IBM

Inventor： AHRENS GEORGE ,  KITAMORN ALONGKORN ,  MCLAUGHLIN CHARLES ANDREW ,  VADEN MICHAEL

IPC: G06F12/08 ,  G06F11/00 ,  G06F11/07 ,  G06F11/32 ,  G06F12/16 ,  G11C29/00 ,  G11C29/42

Abstract: PROBLEM TO BE SOLVED: To provide a mechanism for predicting a fault of the array bit line or the driver of a cache. SOLUTION: This mechanism characterizes the fault by checking whether there are five consecutive errors at different addresses within the same syndrome in the case of calling event scanning polling. When characterizing the fault, the mechanism reports it to a system for correction and maintenance including processor constitution release or preventive processor exchange of dynamic or/and booting time.

公开(公告)号：JP2004220582A

公开(公告)日：2004-08-05

申请号：JP2003421702

申请日：2003-12-18

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： AUSTEN CHRISTOPHER HARRY ,  KITAMORN ALONGKORN ,  OLIVER DOUGLAS WAYNE ,  WILLOUGHBY DAVID R

IPC: G06F11/30 ,  G06F9/46 ,  G06F9/48 ,  G06F11/07 ,  G06F11/34 ,  H04L1/22

CPC classification number: G06F11/0781 ,  G06F11/0712

Abstract: PROBLEM TO BE SOLVED: To provide an improved method, a device and a computer instruction for reporting an error log in an LPAR (logical partitioning) data processing system.
SOLUTION: This invention provides the method, the device and the computer instruction for managing the error log. A request is received from a partition within a plurality of partitions in the LPAR data processing system to access error information. Whether the error information is present in a buffer or not is determined. In response to that the error information is not present in the buffer, the error information is searched from a nonvolatile memory. The obtained error information searched from the nonvolatile memory is stored in the buffer. The error information is stored in the buffer only for a prescribed period of time. After the period of time, the error information is deleted or removed from the buffer. The outdated error information is not returned to the plurality of partitions.
COPYRIGHT: (C)2004,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种用于在LPAR（逻辑分区）数据处理系统中报告错误日志的改进方法，设备和计算机指令。 解决方案：本发明提供了用于管理错误日志的方法，装置和计算机指令。 从LPAR数据处理系统中的多个分区内的分区接收请求以访问错误信息。 确定错误信息是否存在于缓冲器中。 响应于该错误信息不存在于缓冲器中，从非易失性存储器搜索错误信息。 从非易失性存储器中搜索到的获得的错误信息被存储在缓冲器中。 错误信息仅在规定的时间内存储在缓冲器中。 一段时间后，将从缓冲区中删除或删除错误信息。 过期的错误信息不返回到多个分区。 版权所有（C）2004，JPO＆NCIPI

公开(公告)号：PL335938A1

公开(公告)日：2000-05-22

申请号：PL33593898

申请日：1998-03-23

Applicant: IBM

Inventor： MCLAUGHLIN CHARLES ANDREW ,  KITAMORN ALONGKORN

IPC: G06F11/22 ,  G06F11/00 ,  G06F11/267 ,  G06F13/00

Abstract: Method and system aspects for fault isolation on a bus are provided. In a method aspect, a method for isolating a fault condition on a bus of a computer system, the computer system including an input/output (I/O) subsystem formed by a plurality of I/O devices communicating via the bus, includes categorizing, in a recursive manner, the I/O subsystem, and isolating a source of an error condition within the I/O subsystem. Further, the I/O subsystem communicates via a peripheral component interconnect, PCI, bus. In a system aspect, a computer system for isolating a fault condition on a PCI bus includes a processing mechanism, and an input/output mechanism, coupled to the processing mechanism, comprising a plurality of input/output devices and bridges coupled to a PCI bus and communicating according to a PCI standard. In addition, the system includes a fault isolation mechanism within the processing mechanism for identifying a source of an error condition in the input/output mechanism. Further, the fault isolation mechanism performs categorization of the input/output mechanism in a recursive manner.

公开(公告)号：DE69801744D1

公开(公告)日：2001-10-25

申请号：DE69801744

申请日：1998-03-23

Applicant: IBM

Inventor： MCLAUGHLIN ANDREW ,  KITAMORN ALONGKORN

IPC: G06F11/22 ,  G06F11/00 ,  G06F11/267 ,  G06F13/00

Abstract: Method and system aspects for fault isolation on a bus are provided. In a method aspect, a method for isolating a fault condition on a bus of a computer system, the computer system including an input/output (I/O) subsystem formed by a plurality of I/O devices communicating via the bus, includes categorizing, in a recursive manner, the I/O subsystem, and isolating a source of an error condition within the I/O subsystem. Further, the I/O subsystem communicates via a peripheral component interconnect, PCI, bus. In a system aspect, a computer system for isolating a fault condition on a PCI bus includes a processing mechanism, and an input/output mechanism, coupled to the processing mechanism, comprising a plurality of input/output devices and bridges coupled to a PCI bus and communicating according to a PCI standard. In addition, the system includes a fault isolation mechanism within the processing mechanism for identifying a source of an error condition in the input/output mechanism. Further, the fault isolation mechanism performs categorization of the input/output mechanism in a recursive manner.

公开(公告)号：DE69801744T2

公开(公告)日：2002-07-04

申请号：DE69801744

申请日：1998-03-23

Applicant: IBM

Inventor： MCLAUGHLIN ANDREW ,  KITAMORN ALONGKORN

IPC: G06F11/22 ,  G06F11/00 ,  G06F11/267 ,  G06F13/00

Abstract: Method and system aspects for fault isolation on a bus are provided. In a method aspect, a method for isolating a fault condition on a bus of a computer system, the computer system including an input/output (I/O) subsystem formed by a plurality of I/O devices communicating via the bus, includes categorizing, in a recursive manner, the I/O subsystem, and isolating a source of an error condition within the I/O subsystem. Further, the I/O subsystem communicates via a peripheral component interconnect, PCI, bus. In a system aspect, a computer system for isolating a fault condition on a PCI bus includes a processing mechanism, and an input/output mechanism, coupled to the processing mechanism, comprising a plurality of input/output devices and bridges coupled to a PCI bus and communicating according to a PCI standard. In addition, the system includes a fault isolation mechanism within the processing mechanism for identifying a source of an error condition in the input/output mechanism. Further, the fault isolation mechanism performs categorization of the input/output mechanism in a recursive manner.

公开(公告)号：SG76539A1

公开(公告)日：2000-11-21

申请号：SG1998000475

申请日：1998-03-02

Applicant: IBM

Inventor： MCLAUGHLIN CHARLES ANDREW ,  KITAMORN ALONGKORN

IPC: G06F11/22 ,  G06F11/00 ,  G06F11/267 ,  G06F13/00

Abstract: Method and system aspects for fault isolation on a bus are provided. In a method aspect, a method for isolating a fault condition on a bus of a computer system, the computer system including an input/output (I/O) subsystem formed by a plurality of I/O devices communicating via the bus, includes categorizing, in a recursive manner, the I/O subsystem, and isolating a source of an error condition within the I/O subsystem. Further, the I/O subsystem communicates via a peripheral component interconnect, PCI, bus. In a system aspect, a computer system for isolating a fault condition on a PCI bus includes a processing mechanism, and an input/output mechanism, coupled to the processing mechanism, comprising a plurality of input/output devices and bridges coupled to a PCI bus and communicating according to a PCI standard. In addition, the system includes a fault isolation mechanism within the processing mechanism for identifying a source of an error condition in the input/output mechanism. Further, the fault isolation mechanism performs categorization of the input/output mechanism in a recursive manner.