公开(公告)号：JP2002278848A

公开(公告)日：2002-09-27

申请号：JP2002031331

申请日：2002-02-07

Applicant: IBM

Inventor： AHRENS GEORGE ,  KITAMORN ALONGKORN ,  MCLAUGHLIN CHARLES ANDREW ,  VADEN MICHAEL

IPC: G06F12/08 ,  G06F11/00 ,  G06F11/07 ,  G06F11/32 ,  G06F12/16 ,  G11C29/00 ,  G11C29/42

Abstract: PROBLEM TO BE SOLVED: To provide a mechanism for predicting a fault of the array bit line or the driver of a cache. SOLUTION: This mechanism characterizes the fault by checking whether there are five consecutive errors at different addresses within the same syndrome in the case of calling event scanning polling. When characterizing the fault, the mechanism reports it to a system for correction and maintenance including processor constitution release or preventive processor exchange of dynamic or/and booting time.