公开(公告)号：DE3788471D1

公开(公告)日：1994-01-27

申请号：DE3788471

申请日：1987-07-10

Applicant: IBM

Inventor： KNOEDLER CHRISTINA MARIE ,  LATULIPE DOUGLAS CHARLES

IPC: H01L21/302 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/331 ,  H01L21/338 ,  H01L29/205 ,  H01L29/73 ,  H01L29/737 ,  H01L29/80 ,  H01L29/812 ,  H01L21/306 ,  H01L21/28

Abstract: A process for the fabrication of a vertically differentiated semiconductor structure is disclosed. In this process the semiconductor structure is covered with a vertical erosion control mask (13, Fig. 3). The control mask covering at least one horizontal surface (7) of the semiconductor structure is removed leaving the vertical surface covering (13) intact (Fig. 5). An isotropic etching of the uncovered horizontal surface (7) next occurs. Finally, the control mask covering (13) of the vertical surface (11) of the semiconductor structure is removed (Fig. 1). This process permits etching treatment of horizontal surface defects without adverse effect on the vertical surface (11) of the semiconductor structure.

公开(公告)号：DE3866935D1

公开(公告)日：1992-01-30

申请号：DE3866935

申请日：1988-03-15

Applicant: IBM

Inventor： HEIBLUM MORDEHAI ,  KNOEDLER CHRISTINA MARIE ,  THOMAS DAVID CHARLES

IPC: H01L29/68 ,  H01L29/06 ,  H01L29/205 ,  H01L29/423 ,  H01L29/76

Abstract: A vertical ballistic transistor (50) is described. Base metallic contacts (160) of reliable thickness are deposited on a carrier depletable layer (101) and diffuse into the base (120). A depletion region (200) forms in the depletable layer (101). The depletion region electrically isolates the base contact (160) from the emitter (103). The thickness of the depletable layer (101) prevents the generation of usual depletion regions in the base (120) that tend to cut off base current.

公开(公告)号：DE3788471T2

公开(公告)日：1994-06-23

申请号：DE3788471

申请日：1987-07-10

Applicant: IBM

Inventor： KNOEDLER CHRISTINA MARIE ,  LATULIPE DOUGLAS CHARLES

IPC: H01L21/302 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/331 ,  H01L21/338 ,  H01L29/205 ,  H01L29/73 ,  H01L29/737 ,  H01L29/80 ,  H01L29/812 ,  H01L21/306 ,  H01L21/28

Abstract: A process for the fabrication of a vertically differentiated semiconductor structure is disclosed. In this process the semiconductor structure is covered with a vertical erosion control mask (13, Fig. 3). The control mask covering at least one horizontal surface (7) of the semiconductor structure is removed leaving the vertical surface covering (13) intact (Fig. 5). An isotropic etching of the uncovered horizontal surface (7) next occurs. Finally, the control mask covering (13) of the vertical surface (11) of the semiconductor structure is removed (Fig. 1). This process permits etching treatment of horizontal surface defects without adverse effect on the vertical surface (11) of the semiconductor structure.