公开(公告)号：DE3275689D1

公开(公告)日：1987-04-16

申请号：DE3275689

申请日：1982-03-09

Applicant: IBM

Inventor： FOGELL LEONARD LEWIS ,  LEVINE SAMUEL ROBERT ,  WEINBERGER ARNOLD

IPC: G06F11/00 ,  G06F11/08 ,  H03M13/51 ,  H03M13/02

Abstract: This error checker determines if more than one set of control signals F1 through FN are on and also flags invalid as opposed to valid situations where none of the control signals F1 to FN are on. To distinguish the invalid from valid situations where none of the control signals F1 to FN are on, an additional control signal X = F1 · F2 ·...· FN is generated and then fed with the control signals F1 to FN through a prior art detector which detects when more than one or none of the control signals X and F1 through FN are on.

公开(公告)号：DE3064366D1

公开(公告)日：1983-09-01

申请号：DE3064366

申请日：1980-04-10

Applicant: IBM

Inventor： LETTENEY ROBERT CLEMENT ,  LEVINE SAMUEL ROBERT ,  SHEN DAVID TJENGMING ,  WEINBERGER ARNOLD

IPC: G06F7/505 ,  G06F7/483 ,  G06F7/52 ,  G06F7/53 ,  G06F7/533

公开(公告)号：DE2800598A1

公开(公告)日：1978-07-13

申请号：DE2800598

申请日：1978-01-07

Applicant: IBM

Inventor： LEVINE SAMUEL ROBERT ,  SINGH SHANKER ,  WEINBERGER ARNOLD

IPC: G06F7/493 ,  G06F7/494 ,  G06F7/50 ,  G06F7/508