公开(公告)号：GB2582087A

公开(公告)日：2020-09-09

申请号：GB202007421

申请日：2018-12-03

Applicant: IBM

Inventor： JUNTAO LI ,  KANGGUO CHENG ,  LIYING JLANG ,  JOHN GERARD GAUDIELLO

IPC: H01L21/84

Abstract: A method of forming a logic device and a power device on a substrate is provided. The method includes forming a first vertical fin on a first region of the substrate and a second vertical fin on a second region of the substrate, wherein an isolation region separates the first region from the second region, forming a dielectric under-layer segment on the second vertical fin on the second region, and forming a first gate structure on the dielectric under- layer segment and second vertical fin on the second region.

公开(公告)号：GB2582087B

公开(公告)日：2022-03-30

申请号：GB202007421

申请日：2018-12-03

Applicant: IBM

Inventor： JUNTAO LI ,  KANGGUO CHENG ,  LIYING JLANG ,  JOHN GERARD GAUDIELLO

IPC: H01L21/84

Abstract: A method of forming a logic device and a power device on a substrate is provided. The method includes forming a first vertical fin on a first region of the substrate and a second vertical fin on a second region of the substrate, wherein an isolation region separates the first region from the second region, forming a dielectric under-layer segment on the second vertical fin on the second region, and forming a first gate structure on the dielectric under-layer segment and second vertical fin on the second region.