中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

15 records (took 0.016 seconds)

    5.
    发明专利
    未知

    公开(公告)号：DE1154514B

    公开(公告)日：1963-09-19

    申请号：DEI0014065

    申请日：1957-12-04

    Applicant: IBM DEUTSCHLAND

    Inventor： LOGUE JOSEPH CARL ,  GOODMAN HAROLD CLARK

    IPC: G11C7/02 ,  G11C11/06

    Abstract: 849,142. Circuits employing bi-stable magnetic elements. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 3, 1957 [Dec. 5, 1956], No. 37675/57. Class 40 (9). [Also in Group XIX] In a matrix-type digital data store, Fig. 1, bipolar output signals are fed to two push-pull connected transistors 12, 15 and thence via a transformer 22, a full-wave rectifier 25, 26 and a gated amplifier 34 to an output terminal. The gated amplifier 34 is controlled by gate pulses on a terminal 51 so that it only responds to signals from the full-wave rectifier during the read-out periods and not during read-in periods.

    9.
    发明专利
    未知

    公开(公告)号：DE1023613B

    公开(公告)日：1958-01-30

    申请号：DEI0009608

    申请日：1954-12-30

    Applicant: IBM DEUTSCHLAND

    Inventor： BRUCE GEORGE DUNCAN ,  LOGUE JOSEPH CARL

    IPC: G11C19/04 ,  H03K3/30 ,  H03K3/45 ,  H03K23/76

    Abstract: 766,852. Electronic counting-apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 24, 1954 [Dec. 31, 1953], No. 37379/54. Class 106 (1). [Also in Groups XXXIX and XL (c)] In a circuit triggered and reset by pulses of one polarity, the pulses are applied to transistors 10, 11 in parallel, Fig. 1, each feeding a saturable core memory device 1 so that each is effective in turn to magnetize the core in one sense or the other. Four of these circuits may be interconnected to form a decimal counter. A positive pulse applied to the transistors 10, 11 causes one, for example 10, to conduct - and pass collector current through a driving winding 3, feedback being effective over winding 5 to cause the core 2 to pass into the saturated region. The next input pulse is ineffective on transistor 10 since any conduction would tend to drive the core further into the saturated region. The pulse is, however, operative to cause transistor 11 to conduct since the windings 4, 6 are such as to magnetize the core in the opposite sense, the process continuing until saturation is reached in that direction. Alternative output pulses are suppressed by diode 24 so that pulses of one polarity appear at terminals 22, 23. In a modification, Fig. 2 (not shown), the emitters are earthed and the input applied in the common lead of windings 5, 6. Point contact transistors 33, 34 may be used, Fig. 3, with a limiting resistor 37 capable of passing only sufficient current to maintain one in a conducting state, a diode 43 tying the emitters to earth. A negative input pulse applied over transformer 41 causes conduction to pass from one transistor to the other thereby changing the state of saturation of the core 26. Decimal counter. Three circuits 52, 53, 54 may be arranged in cascade, Fig. 4, to give a count of eight, the output pulse being fed to the base circuit of transistor 34 in stage 55, Fig. 5 (not shown) to reverse the state of core 26. The ninth pulse is only effective to restore stage 52 but the tenth pulse in triggering stage 52 is also fed out over the auxiliary winding 56 to the base circuit of transistor 33 to restore stage 55, an output pulse being fed out over diode 59. An auxiliary winding 60 is arranged to feed back a paralysing pulse over diode 62 to prevent the change-over of stage 53.

Patent Agency Ranking