公开(公告)号：GB1248273A

公开(公告)日：1971-09-29

申请号：GB1665669

申请日：1969-03-31

Applicant: IBM

Inventor： LOUIS HELMUT PETER ,  SCHUENEMANN CLAUS HEINRICH ,  SPRUTH WILHELM

IPC: G11C11/41 ,  G11C11/36 ,  G11C11/39 ,  G11C11/411 ,  H03K3/012 ,  H03K3/35

Abstract: 1,248,273. Data storage. INTERNATIONAL BUSINESS MACHINES CORP. 31 March, 1969 [30 March, 1968], No. 16656/69. Heading G4C. During read or write operations in a data store, a relatively high power voltage is supplied to the addressed storage elements and the voltage supply to each unaddressed element is interrupted, whereas at other times a relatively low standby voltage is supplied to all the elements. In the matrix thyristor or SCR store of Fig. 1, the voltages referred to are applied between row and column leads X, Y. Row leads B0, B1 are used for bits to be written or being non-destructively sensed. A second embodiment uses single-emitter thyristors, leads X being dispensed with, their function being taken over by the bit leads, B0, B1. Power consumption in the matrix is the same during and between read and write operations. Monolithic construction is mentioned.