公开(公告)号：JP2004087100A

公开(公告)日：2004-03-18

申请号：JP2003275677

申请日：2003-07-16

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： LOUIS RUUCHEN SHEW ,  FREDEMAN GREGORY ,  HWANG CHORNG-LII ,  KIRIHATA TOSHIAKI K ,  PONTIUS DALE E

IPC: G11C11/413 ,  G11C11/401 ,  G11C29/00 ,  G11C29/04

CPC classification number: G11C29/846 ,  G11C2207/104

Abstract: PROBLEM TO BE SOLVED: To provide an effective column restoration system which replaces a defective column element with a redundant element.
SOLUTION: A column redundant device 10 includes a fuse information storage device for every individual microcell to store fuse information indicating the location of any one of defective elements. A first bank address decoding mechanism decodes a reading bank address corresponding to a first microcell and a second bank address decoding mechanism decodes a writing bank address corresponding to a second microcell. When at least one defective column element is included in the first microcell, the device 10 generates an internal column address corresponding to at least one defective column element in the first microcell. Similarly, the device 10 generates an internal column address corresponding to at least one defective column element in the second microcell when at least one defective column element is included in the second microcell.
COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2001244441A

公开(公告)日：2001-09-07

申请号：JP2001007860

申请日：2001-01-16

Applicant: IBM

Inventor： CLEVENGER LAWRENCE A ,  RAMA DEIVAKARUMI ,  LOUIS RUUCHEN SHEW ,  YUJUMU RI

IPC: H01L23/522 ,  H01L21/225 ,  H01L21/336 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/088 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To provide an NMOS structure and its manufacturing method for solving a problem of junctional yield in a conventional NMOS drive circuit. SOLUTION: A drive circuit in N-channel metallic oxide film semiconductor(NMOS) includes a boost gate stack formed on a substrate and having source and drain formed in low density N-type implantation step, and an N-drive circuit joined with the boost gate stack.